Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/47166 )
Change subject: flaschips.c: Fix building with CONFIG_DUMMY=no
......................................................................
flaschips.c: Fix building with CONFIG_DUMMY=no
With CONFIG_DUMMY=yes dummuflasher.c is not linked in so there is
definition of probe_variable_size.
Change-Id: Ib9bae93fadc55cf133e837e63419da104a6298be
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M flashchips.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/47166/1
diff --git a/flashchips.c b/flashchips.c
index 48efb85..1681f42 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -19081,3 +19081,7 @@
};
const unsigned int flashchips_size = ARRAY_SIZE(flashchips);
+
+#if !CONFIG_DUMMY
+int probe_variable_size(struct flashctx *flash) { return 0; };
+#endif
--
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Gerrit-Change-Id: Ib9bae93fadc55cf133e837e63419da104a6298be
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63130 )
Change subject: pony_spi.c: Extract out get_params to simplify init
......................................................................
Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63130/comment/cf0f5029_97fd7e36
PS5, Line 9: function pony_init_spi)`,
> I would appreciate if you move this to the next line. […]
Done
https://review.coreboot.org/c/flashrom/+/63130/comment/6be39e72_c863ea25
PS5, Line 10: number of
> same here
Done
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Hello Felix Singer, build bot (Jenkins), Light, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/63130
to look at the new patch set (#6).
Change subject: pony_spi.c: Extract out get_params to simplify init
......................................................................
pony_spi.c: Extract out get_params to simplify init
In light of `commit caa0335114a81`, extract out the get_param logic to
its own function to simplify the number of cleanup paths.
BUG=none
TEST=builds
Change-Id: I364febc05c870683cbad114583762b0c006f4bac
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M pony_spi.c
1 file changed, 55 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/63130/6
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Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/63902 )
Change subject: raiden_debug_spi.c: Document where raiden_debug_spi_requests are handled
......................................................................
raiden_debug_spi.c: Document where raiden_debug_spi_requests are handled
Because the enum is a different name to the one within cr50 it
was entirely unclear where these values were handled at the end-point
and what a untargetted REQ_ENABLE actually did. Comment to avoid
needing to chase this again.
BUG=b:224358254
TEST=builds
Change-Id: I8cc78a85660190c9f750bf67994f0d59d69592d8
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63902
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Sam McNally <sammc(a)google.com>
Reviewed-by: Peter Marheine <pmarheine(a)chromium.org>
---
M raiden_debug_spi.c
1 file changed, 8 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Sam McNally: Looks good to me, approved
Peter Marheine: Looks good to me, but someone else must approve
diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c
index 521539f..f9ab3e0 100644
--- a/raiden_debug_spi.c
+++ b/raiden_debug_spi.c
@@ -399,6 +399,10 @@
USB_SPI_UNKNOWN_ERROR = 0x8000,
};
+/* Corresponds with 'enum usb_spi_request' in,
+ * platform/cr50/chip/g/usb_spi.h and,
+ * platform/ec/chip/stm32/usb_spi.h.
+ */
enum raiden_debug_spi_request {
RAIDEN_DEBUG_SPI_REQ_ENABLE = 0x0000,
RAIDEN_DEBUG_SPI_REQ_DISABLE = 0x0001,
@@ -1445,6 +1449,10 @@
static int get_target(void)
{
+ /**
+ * REQ_ENABLE doesn't specify a target bus, and will be rejected
+ * by adapters that support more than one target.
+ */
int request_enable = RAIDEN_DEBUG_SPI_REQ_ENABLE;
char *target_str = extract_programmer_param("target");
--
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Hello build bot (Jenkins), Nico Huber, Angel Pons, Nikolai Artemiev, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59075
to look at the new patch set (#35).
Change subject: tests: test write protection
......................................................................
tests: test write protection
Tests both WP implementation and its emulation in dummy programmer.
Change-Id: I49af7f6d173eb4c56c22d80b01a473b8c499c0f8
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
A tests/chip_wp.c
M tests/meson.build
M tests/tests.c
M tests/tests.h
4 files changed, 338 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/59075/35
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63886 )
Change subject: Makefile: Align BITBANG_SPI with the other DEPENDS_ and USE_ configs
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
Patchset:
PS1:
> This gets dropped with CB:63724. I think the async is ok for a while.
Ack
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