June 2022 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: flashchips: Add ISSI IS25LQ016
by Angel Pons (Code Review) 15 Aug '23

15 Aug '23

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/40431 ) Change subject: flashchips: Add ISSI IS25LQ016 ...................................................................... flashchips: Add ISSI IS25LQ016 Datasheet: http://www.issi.com/WW/pdf/25LQ016.pdf Tested all four PREW functions with a FT2232H. Change-Id: I02f19767b8a60fb2d37adab34894b6edb6ac4494 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/31/40431/1 diff --git a/flashchips.c b/flashchips.c index b4006df..a25f915 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7049,6 +7049,44 @@ { .vendor = "ISSI", + .name = "IS25LQ016", + .bustype = BUS_SPI, + .manufacture_id = ISSI_ID_SPI, + .model_id = ISSI_IS25LQ016, + .total_size = 2048, + .page_size = 256, + /* OTP: 1024B total; read 0x4b; write 0xb1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2300, 3600}, + }, + + { + .vendor = "ISSI", .name = "IS25WP032", .bustype = BUS_SPI, .manufacture_id = ISSI_ID_SPI, diff --git a/flashchips.h b/flashchips.h index e5ef390..b5c0aeb 100644 --- a/flashchips.h +++ b/flashchips.h @@ -459,6 +459,7 @@ #define ISSI_IS25LP064 0x6017 #define ISSI_IS25LP128 0x6018 #define ISSI_IS25LP256 0x6019 +#define ISSI_IS25LQ016 0x1445 #define ISSI_IS25WP032 0x7016 #define ISSI_IS25WP064 0x7017 #define ISSI_IS25WP128 0x7018 -- To view, visit https://review.coreboot.org/c/flashrom/+/40431 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I02f19767b8a60fb2d37adab34894b6edb6ac4494 Gerrit-Change-Number: 40431 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

6 8

Change in flashrom[master]: flashchips: Added missing voltages
by Name of user not set (Code Review) 02 Jun '23

02 Jun '23

roman.stingler(a)gmail.com has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/40432 ) Change subject: flashchips: Added missing voltages ...................................................................... flashchips: Added missing voltages Signed-off-by: Roman Stingler <roman.stingler(a)gmail.com> Change-Id: I0825ab11e53c0b018b49173907e2b274a4cf1fab --- M flashchips.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/32/40432/1 diff --git a/flashchips.c b/flashchips.c index b4006df..f2d9fc1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7650,6 +7650,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7677,6 +7678,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7704,6 +7706,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7727,6 +7730,7 @@ .unlock = unlock_28f004s5, .write = write_82802ab, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -7755,6 +7759,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7783,6 +7788,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -9972,6 +9978,7 @@ .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -17550,6 +17557,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -17573,6 +17581,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { -- To view, visit https://review.coreboot.org/c/flashrom/+/40432 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0825ab11e53c0b018b49173907e2b274a4cf1fab Gerrit-Change-Number: 40432 Gerrit-PatchSet: 1 Gerrit-Owner: roman.stingler(a)gmail.com Gerrit-MessageType: newchange

4 6

Change in flashrom[master]: flaschips.c: Fix building with CONFIG_DUMMY=no
by Arthur Heymans (Code Review) 21 Apr '23

21 Apr '23

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/47166 ) Change subject: flaschips.c: Fix building with CONFIG_DUMMY=no ...................................................................... flaschips.c: Fix building with CONFIG_DUMMY=no With CONFIG_DUMMY=yes dummuflasher.c is not linked in so there is definition of probe_variable_size. Change-Id: Ib9bae93fadc55cf133e837e63419da104a6298be Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M flashchips.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/47166/1 diff --git a/flashchips.c b/flashchips.c index 48efb85..1681f42 100644 --- a/flashchips.c +++ b/flashchips.c @@ -19081,3 +19081,7 @@ }; const unsigned int flashchips_size = ARRAY_SIZE(flashchips); + +#if !CONFIG_DUMMY +int probe_variable_size(struct flashctx *flash) { return 0; }; +#endif -- To view, visit https://review.coreboot.org/c/flashrom/+/47166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib9bae93fadc55cf133e837e63419da104a6298be Gerrit-Change-Number: 47166 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

5 12

Change in flashrom[master]: buspirate: Add option for setting the aux pin
by Sean Anderson (Code Review) 13 Apr '23

13 Apr '23

Sean Anderson has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/43608 ) Change subject: buspirate: Add option for setting the aux pin ...................................................................... buspirate: Add option for setting the aux pin This adds a parameter to drive the aux pin low (or high if you explicitly want the previous behavior). Some boards need to have a reset pin driven low before the firmware can be safely flashed. With the Bus Pirate, this is most easily done with the auxiliary pin. Change-Id: Ieeecfdf1afc06dadda9b8f99547cd74854ca6775 Signed-off-by: Sean Anderson <seanga2(a)gmail.com> --- M buspirate_spi.c M flashrom.8.tmpl 2 files changed, 33 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/43608/1 diff --git a/buspirate_spi.c b/buspirate_spi.c index fdfc0e4..1ccb107 100644 --- a/buspirate_spi.c +++ b/buspirate_spi.c @@ -228,6 +228,7 @@ int serialspeed_index = -1; int ret = 0; int pullup = 0; + int aux = 1; dev = extract_programmer_param("dev"); if (dev && !strlen(dev)) { @@ -277,6 +278,17 @@ } free(tmp); + tmp = extract_programmer_param("aux"); + if (tmp) { + if (strcasecmp("high", tmp) == 0) + ; /* Default */ + else if (strcasecmp("low", tmp) == 0) + aux = 0; + else + msg_perr("Invalid AUX state, driving high by default.\n"); + } + free(tmp); + /* Default buffer size is 19: 16 bytes data, 3 bytes control. */ #define DEFAULT_BUFSIZE (16 + 3) bp_commbuf = malloc(DEFAULT_BUFSIZE); @@ -520,11 +532,18 @@ } /* Initial setup (SPI peripherals config): Enable power, CS high, AUX */ - bp_commbuf[0] = 0x40 | 0x0b; + bp_commbuf[0] = 0x40 | 0x09; if (pullup == 1) { bp_commbuf[0] |= (1 << 2); msg_pdbg("Enabling pull-up resistors.\n"); } + if (aux) { + bp_commbuf[0] |= (1 << 1); + msg_pdbg("Driving AUX high.\n"); + } else { + msg_pdbg("Driving AUX low.\n"); + } + ret = buspirate_sendrecv(bp_commbuf, 1, 1); if (ret) return 1; diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index db50d59..caf860c 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -902,6 +902,19 @@ .URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_r…" \ "in a guide by dangerousprototypes" . Only the external supply voltage (Vpu) is supported as of this writing. +.sp +An optional aux parameter specifies the state of the Bus Pirate auxiliary pin. +This may be used to drive the auxiliary pin high or low before a transfer. +Syntax is +.sp +.B " flashrom -p buspirate_spi:aux=state" +.sp +where +.B state +can be +.BR high " or " low . +The default +.BR state " is " high . .SS .BR "pickit2_spi " programmer .IP -- To view, visit https://review.coreboot.org/c/flashrom/+/43608 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ieeecfdf1afc06dadda9b8f99547cd74854ca6775 Gerrit-Change-Number: 43608 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Anderson <seanga2(a)gmail.com> Gerrit-MessageType: newchange

6 14

Change in ...flashrom[master]: cli_classic: Report the gathered layout entries at level dbg
by Nico Huber (Code Review) 04 Nov '22

04 Nov '22

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31012 Change subject: cli_classic: Report the gathered layout entries at level dbg ...................................................................... cli_classic: Report the gathered layout entries at level dbg Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M cli_classic.c M layout.c M layout.h 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/31012/1 diff --git a/cli_classic.c b/cli_classic.c index ced08c6..536ef24 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -645,6 +645,8 @@ goto out_shutdown; } + report_layout(layout); + flashrom_layout_set(fill_flash, layout); flashrom_flag_set(fill_flash, FLASHROM_FLAG_FORCE, !!force); #if CONFIG_INTERNAL == 1 diff --git a/layout.c b/layout.c index fa66238..c589d17 100644 --- a/layout.c +++ b/layout.c @@ -229,3 +229,17 @@ return ret; } + +void report_layout(const struct flashrom_layout *const l) +{ + unsigned int i; + + if (!l) + return; + + msg_gdbg("Gathered %zu layout entries:\n", l->num_entries); + for (i = 0; i < l->num_entries; ++i) { + msg_gdbg("%08"PRIx32":%08"PRIx32" %s\n", + l->entries[i].start, l->entries[i].end, l->entries[i].name); + } +} diff --git a/layout.h b/layout.h index eb54a4f..61311bc 100644 --- a/layout.h +++ b/layout.h @@ -59,4 +59,6 @@ int process_include_args(struct flashrom_layout *); +void report_layout(const struct flashrom_layout *); + #endif /* !__LAYOUT_H__ */ -- To view, visit https://review.coreboot.org/c/flashrom/+/31012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Gerrit-Change-Number: 31012 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

5 19

Change in flashrom[master]: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
by Nikolai Artemiev (Code Review) 02 Jun '22

02 Jun '22

Attention is currently required from: Edward O'Callaghan, Sergii Dmytruk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64375 ) Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register() ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/64375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac Gerrit-Change-Number: 64375 Gerrit-PatchSet: 8 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Thu, 02 Jun 2022 06:22:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in flashrom[master]: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
by Nikolai Artemiev (Code Review) 02 Jun '22

02 Jun '22

Attention is currently required from: Edward O'Callaghan, Sergii Dmytruk. Nikolai Artemiev has uploaded a new patch set (#8) to the change originally created by Edward O'Callaghan. ( https://review.coreboot.org/c/flashrom/+/64375 ) Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register() ...................................................................... writeprotect.c: Allow opaque masters to hook spi_{rw}_register() Allow specialisation in opaque masters, such as ichspi hwseq, to write to status registers. Also update the dispatch logic in libflashrom to call wp code when status register access functions are provided by an opaque master. Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> Co-Authored-by: Nikolai Artemiev <nartemiev(a)google.com> --- M include/programmer.h M libflashrom.c M writeprotect.c 3 files changed, 35 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/64375/8 -- To view, visit https://review.coreboot.org/c/flashrom/+/64375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac Gerrit-Change-Number: 64375 Gerrit-PatchSet: 8 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

1 0

Change in flashrom[master]: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
by Nikolai Artemiev (Code Review) 02 Jun '22

02 Jun '22

Attention is currently required from: Edward O'Callaghan, Sergii Dmytruk. Nikolai Artemiev has uploaded a new patch set (#7) to the change originally created by Edward O'Callaghan. ( https://review.coreboot.org/c/flashrom/+/64375 ) Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register() ...................................................................... writeprotect.c: Allow opaque masters to hook spi_{rw}_register() Allow specialisation in opaque masters, such as ichspi hwseq, to write to status registers. Also update the dispatch logic in libflashrom to use call wp code when status register access functions are provided by an opaque master. Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> Co-Authored-by: Nikolai Artemiev <nartemiev(a)google.com> --- M include/programmer.h M libflashrom.c M writeprotect.c 3 files changed, 35 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/64375/7 -- To view, visit https://review.coreboot.org/c/flashrom/+/64375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac Gerrit-Change-Number: 64375 Gerrit-PatchSet: 7 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

1 0

Change in flashrom[master]: tests: Use regular cmocka wraps for hwaccess functions
by Anastasia Klimchuk (Code Review) 02 Jun '22

02 Jun '22

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/64881 ) Change subject: tests: Use regular cmocka wraps for hwaccess functions ...................................................................... tests: Use regular cmocka wraps for hwaccess functions hwaccess functions used to be static inline functions and needed a special treatment so that they could be mocked for unit tests. This has changed, see include/hwaccess_x86_io.h now the functions are not static inline anymore, and it is possible to use regular cmocka wraps. Fixes https://ticket.coreboot.org/issues/385 BUG=b:181803212 TEST=ninja test Change-Id: Iafce071ea7ad5bcfdebbba968699d5743705f8e0 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M meson.build D tests/hwaccess_x86_io_unittest.h M tests/meson.build M tests/tests.c M tests/wraps.h 5 files changed, 29 insertions(+), 83 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/64881/1 diff --git a/meson.build b/meson.build index a8e5a7b..abaed4e 100644 --- a/meson.build +++ b/meson.build @@ -512,7 +512,6 @@ compile_args : [ '-includestdlib.h', '-includeunittest_env.h', - '-includehwaccess_x86_io_unittest.h' ], dependencies : [ deps, diff --git a/tests/hwaccess_x86_io_unittest.h b/tests/hwaccess_x86_io_unittest.h deleted file mode 100644 index 14f3caa..0000000 --- a/tests/hwaccess_x86_io_unittest.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright 2021 Google LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * This header is used instead of hwaccess_x86_io.h for unit tests - * (see flashrom_test_dep in meson.build). - * - * There is no hardware in unit test environment and all hardware operations - * need to be mocked. - */ - -/* - * The same guard is used intentionally for hwaccess_x86_io.h and - * hwaccess_x86_io_unittest.h. When build is made for the test environment, - * hwaccess_x86_io_unittest.h is included first, and it effectively - * replaces hwaccess_x86_io.h. - */ -#ifndef __HWACCESS_X86_IO_H__ -#define __HWACCESS_X86_IO_H__ 1 - -#define OUTB(v, p) test_outb(v, p) -#define OUTW(v, p) test_outw(v, p) -#define OUTL(v, p) test_outl(v, p) -#define INB(p) test_inb(p) -#define INW(p) test_inw(p) -#define INL(p) test_inl(p) - -#include <stdint.h> - -int rget_io_perms(void); - -/* - * Dummy implementation of iopl from sys/io.h. - * sys/io.h by itself is platform-specific, so instead of including - * the header we just have this dummy function, which is sufficient - * for test purposes. - */ -static inline int iopl(int level) -{ - return 0; -} - -/* All functions below are mocked in unit tests. */ - -void test_outb(uint8_t value, uint16_t port); -uint8_t test_inb(uint16_t port); -void test_outw(uint16_t value, uint16_t port); -uint16_t test_inw(uint16_t port); -void test_outl(uint32_t value, uint16_t port); -uint32_t test_inl(uint16_t port); - -#endif /* !__HWACCESS_X86_IO_H__ */ diff --git a/tests/meson.build b/tests/meson.build index 588ac17..38f5be5 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -67,12 +67,12 @@ '-Wl,--wrap=clearerr', '-Wl,--wrap=setvbuf', '-Wl,--wrap=rget_io_perms', - '-Wl,--wrap=test_outb', - '-Wl,--wrap=test_inb', - '-Wl,--wrap=test_outw', - '-Wl,--wrap=test_inw', - '-Wl,--wrap=test_outl', - '-Wl,--wrap=test_inl', + '-Wl,--wrap=OUTB', + '-Wl,--wrap=INB', + '-Wl,--wrap=OUTW', + '-Wl,--wrap=INW', + '-Wl,--wrap=OUTL', + '-Wl,--wrap=INL', '-Wl,--wrap=usb_dev_get_by_vid_pid_number', '-Wl,--wrap=libusb_init', '-Wl,--wrap=libusb_open', diff --git a/tests/tests.c b/tests/tests.c index a719a8f..8f002ab 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -321,14 +321,14 @@ return 0; } -void __wrap_test_outb(unsigned char value, unsigned short port) +void __wrap_OUTB(unsigned char value, unsigned short port) { /* LOG_ME; */ if (get_io() && get_io()->outb) get_io()->outb(get_io()->state, value, port); } -unsigned char __wrap_test_inb(unsigned short port) +unsigned char __wrap_INB(unsigned short port) { /* LOG_ME; */ if (get_io() && get_io()->inb) @@ -336,14 +336,14 @@ return 0; } -void __wrap_test_outw(unsigned short value, unsigned short port) +void __wrap_OUTW(unsigned short value, unsigned short port) { /* LOG_ME; */ if (get_io() && get_io()->outw) get_io()->outw(get_io()->state, value, port); } -unsigned short __wrap_test_inw(unsigned short port) +unsigned short __wrap_INW(unsigned short port) { /* LOG_ME; */ if (get_io() && get_io()->inw) @@ -351,14 +351,14 @@ return 0; } -void __wrap_test_outl(unsigned int value, unsigned short port) +void __wrap_OUTL(unsigned int value, unsigned short port) { /* LOG_ME; */ if (get_io() && get_io()->outl) get_io()->outl(get_io()->state, value, port); } -unsigned int __wrap_test_inl(unsigned short port) +unsigned int __wrap_INL(unsigned short port) { /* LOG_ME; */ if (get_io() && get_io()->inl) @@ -366,6 +366,17 @@ return 0; } +/* + * Dummy implementation of iopl from sys/io.h. + * sys/io.h by itself is platform-specific, so instead of including + * the header we just have this dummy function, which is sufficient + * for test purposes. + */ +static inline int iopl(int level) +{ + return 0; +} + int main(void) { int ret = 0; diff --git a/tests/wraps.h b/tests/wraps.h index c088d98..bfa8a41 100644 --- a/tests/wraps.h +++ b/tests/wraps.h @@ -58,12 +58,12 @@ int __wrap_ferror(FILE *fp); void __wrap_clearerr(FILE *fp); int __wrap_rget_io_perms(void); -void __wrap_test_outb(unsigned char value, unsigned short port); -unsigned char __wrap_test_inb(unsigned short port); -void __wrap_test_outw(unsigned short value, unsigned short port); -unsigned short __wrap_test_inw(unsigned short port); -void __wrap_test_outl(unsigned int value, unsigned short port); -unsigned int __wrap_test_inl(unsigned short port); +void __wrap_OUTB(unsigned char value, unsigned short port); +unsigned char __wrap_INB(unsigned short port); +void __wrap_OUTW(unsigned short value, unsigned short port); +unsigned short __wrap_INW(unsigned short port); +void __wrap_OUTL(unsigned int value, unsigned short port); +unsigned int __wrap_INL(unsigned short port); int __wrap_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -- To view, visit https://review.coreboot.org/c/flashrom/+/64881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafce071ea7ad5bcfdebbba968699d5743705f8e0 Gerrit-Change-Number: 64881 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

1 0

Change in flashrom[master]: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
by Nikolai Artemiev (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Edward O'Callaghan, Sergii Dmytruk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64375 ) Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register() ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/64375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac Gerrit-Change-Number: 64375 Gerrit-PatchSet: 6 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 09:58:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

2023

2022

2021

2020

2019

2018

2017

flashrom-gerrit June 2022