Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/46523 )
Change subject: dummyflasher.c: Use programmer logger functions
......................................................................
dummyflasher.c: Use programmer logger functions
All but three log messages use the programmer logger. Change the three
outliers that were using the chip logger accordingly.
Change-Id: Ia8668e05df2da739e6bb4c7d0fddad86e8d054a3
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M dummyflasher.c
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/46523/1
diff --git a/dummyflasher.c b/dummyflasher.c
index 6426ad2..d233db4 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -610,7 +610,7 @@
}
for (i = 0; i < data->spi_ignorelist_size; i++) {
if (writearr[0] == data->spi_ignorelist[i]) {
- msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
+ msg_pdbg("Ignoring ignorelisted SPI command 0x%02x\n",
data->spi_ignorelist[i]);
/* Return success because the command does not fail,
* it is simply ignored.
@@ -1050,7 +1050,7 @@
* Search "total_size * 1024" in code.
*/
flash->chip->total_size = emu_data->emu_chip_size / 1024;
- msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
+ msg_pdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
flash->chip->total_size);
/* Update the first count of each of the block_erasers. */
@@ -1061,7 +1061,7 @@
eraser->eraseblocks[0].count = 1;
eraser->eraseblocks[0].size = emu_data->emu_chip_size;
- msg_cdbg("%s: eraser.size=%d, .count=%d\n",
+ msg_pdbg("%s: eraser.size=%d, .count=%d\n",
__func__, eraser->eraseblocks[0].size,
eraser->eraseblocks[0].count);
}
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Change subject: fmap: Update major/minor version check
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/79060/comment/873dd0ba_d6b35c69 :
PS2, Line 9: It's not valid to separately check the major and minor versions. The
: proper minor check would be something like:
:
: if (fmap->ver_major == FMAP_VER_MAJOR &&
: fmap->ver_minor > FMAP_VER_MINOR)
Brian, I like this idea! Maybe you can move the code from commit message into the code? :)
I looked into the chromiumos patch you linked, it still checks both major and minor versions.
The diff I see is that the check is more strict (both major and minor version expected to be exact equal) while initial fmap.c checks that the versions are not greater than.
I can agree to make the check more strict, but I don't see why checking minor version has to be dropped, I think it can stay?
I admit I haven't looked into cbfstool code, is there a way you can link a relevant piece? (if you think it's useful. if not then not)
Patchset:
PS2:
> Hi Anastasia: […]
Sure, I am having a look! I added one comment.
I didn't realise this patch is hanging without attention, sorry
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Change subject: flashrom_tester: Fix partial_lock_test on libflashrom
......................................................................
Patch Set 4: Code-Review+2
(2 comments)
Patchset:
PS3:
> Ed, Evan, thank you so much for reviews! Could you please vote on the patch?
Alright, it seems you are busy at the moment.
File util/flashrom_tester/flashrom/src/cmd.rs:
https://review.coreboot.org/c/flashrom/+/79304/comment/fb09e840_e2c6053e :
PS3, Line 301: // TODO
> From a syntax perspective: […]
Thank you for detailed explanation, I appreciate so much!
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Change subject: fmap: Update major/minor version check
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Hi Anastasia:
Could you help check if this is okay to submit?
Thanks!
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Change subject: flashrom_tester: Fix partial_lock_test on libflashrom
......................................................................
Patch Set 4:
(1 comment)
File util/flashrom_tester/flashrom/src/cmd.rs:
https://review.coreboot.org/c/flashrom/+/79304/comment/96ba8561_f2faa87d :
PS3, Line 301: // TODO
From a syntax perspective:
In Rust, `pub trait Flashrom` is an interface that defines method signatures, such as `write_from_file()` and `wp_range()`.
We have two structs, `pub struct FlashromLib` (from `util/flashrom_tester/flashrom/src/flashromlib.rs`) and `pub struct FlashromCmd` (from `util/flashrom_tester/flashrom/src/cmd.rs`), that implement the `Flashrom` trait. This enables polymorphism.
To prevent runtime errors, both `FlashromLib` and `FlashromCmd` must implement the `fn set_flags()` method from the `Flashrom` trait.
---
From the `flashrom_tester`'s perspective:
flashrom_tester supports two execution scenarios: "cmd" and "lib".
lib: In this scenario, a `flashrom_lib` instance is created at the beginning of the test. Its constructor (link to constructor: [gerrit]( https://review.coreboot.org/c/flashrom/+/79304/4/util/flashrom_tester/src/t… should set default flags that will be used by all commands with `set_flags()`.
cmd: Methods are interpreted as sequences of flashrom commands. Each command resets flags to default values (link to cli_classic: [github](https://github.com/flashrom/flashrom/blob/main/cli_classic.c#L1226)). Therefore, no action is needed within set_flags().
---
> I am not sure whether we get votes from Ed and Evan, maybe not, I will try to finish review by myself, so that's why I am having questions :)
Thanks! I am not deeply familiar with `flashrom_tester` or Rust either, but I'll try to answer all the further questions.
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Kevin Yu has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79340?usp=email )
Change subject: Add Idaville platform into chipset enable list and add update IRC region support
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
> Hi Anastasia […]
Hi Anastasia
Reference documentation
618610_Intel_Xeon_Processor_Family_D-2700_EDSVol_1_Rev2p0.pdf - Section 41.1.6 Firmware Components
631913_Xeon_D-1700_2700_SPI_PG_Rev2_0.pdf - Section 4.3 Region Access Control
intel-sps-5-0-me-bios-interface-575642-rev1-8.pdf - 4.15.2.9 Dual iRC Update Support
iRC – Intelligent Reset Controller
iRC is a regional firmware for the Intel BIOS Firmware for Mehlow, Idaville and Jacobsville platforms.
iRC is stored in Region 13 which is split in two even sections: active image and backup image. On startup higher version is chosen to by applied.
This means that the status of the two region is not fixed. The higher version area will become the active image and the other region will become the backup image.
According to #631913 SPI programming guide and ME 5.0 spec description, in addition to giving Region 13 read and write permissions, updating iRC must also unlock iRC through Host ME Region Flash Protection Override (HMRFPO) HECI commands, otherwise iRC will not be writable.
According to iRC Update Flow, the HMRFPO command will only unlock the backup image and can only update the backup image each time. The active image cannot be written.
So for iRC, the submitted changes are divided into the following two parts:
1. Trigger HMRFPO command before updating iRC. HMRFPO command needs to be executed by BIOS Firmware, and flashrom needs to cooperate with BIOS to trigger the command to unlock before updating.
2. Skip errors caused by active image writing failure and continue updating other regions. Since the active image is not writable, during the erasing, writing and verification processes, an error will occur in the active image, causing the flashrom to end its operation.
The revised commit has put the changes to the erase and write parts into ich_hwseq_wait_for_cycle_complete() of ichspi.c.
But the changes to the validation part are still in flashrom.c's compare_range(), which doesn't seem to be transferable to ichspi.c.
Thanks
KevinYu
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Change subject: doc: Add docs how to add and update test status of flashchips
......................................................................
Patch Set 4: Code-Review+1
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Change subject: doc: Add docs how to add and update test status of flashchips
......................................................................
Patch Set 4: Code-Review+2
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Change subject: doc: Add docs how to add and update test status of flashchips
......................................................................
Patch Set 4:
(1 comment)
File doc/contrib_howtos/how_to_add_new_chip.rst:
https://review.coreboot.org/c/flashrom/+/80205/comment/b229119a_4e6d03ad :
PS3, Line 86: abc
> nit: replace with `alphabetic`?
Done
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Hello Angel Pons, Nikolai Artemiev, Peter Marheine, Sergii Dmytruk, Stefan Reinauer, Thomas Heijligen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/80205?usp=email
to look at the new patch set (#4).
The following approvals got outdated and were removed:
Code-Review+2 by Sergii Dmytruk, Code-Review+2 by Stefan Reinauer, Verified+1 by build bot (Jenkins)
The change is no longer submittable: Code-Review and Verified are unsatisfied now.
Change subject: doc: Add docs how to add and update test status of flashchips
......................................................................
doc: Add docs how to add and update test status of flashchips
For reference, link to doc about adding new chip
on the old website:
https://wiki.flashrom.org/Development_Guidelines#Adding/reviewing_a_new_fla…
Docs on how to update test status of flashchips never existed before.
Change-Id: I8dde689f2a0430ae10d3fa68bee727c5a9d70aec
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
A doc/contrib_howtos/how_to_add_new_chip.rst
A doc/contrib_howtos/how_to_mark_chip_tested.rst
A doc/contrib_howtos/index.rst
M doc/index.rst
4 files changed, 269 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/80205/4
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Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com>
Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-MessageType: newpatchset