November 2022 - flashrom-gerrit

Change in flashrom[master]: flashchips: Add ISSI IS25LQ016
by Angel Pons (Code Review) 02 Jun '23

02 Jun '23

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/40431 ) Change subject: flashchips: Add ISSI IS25LQ016 ...................................................................... flashchips: Add ISSI IS25LQ016 Datasheet: http://www.issi.com/WW/pdf/25LQ016.pdf Tested all four PREW functions with a FT2232H. Change-Id: I02f19767b8a60fb2d37adab34894b6edb6ac4494 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/31/40431/1 diff --git a/flashchips.c b/flashchips.c index b4006df..a25f915 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7049,6 +7049,44 @@ { .vendor = "ISSI", + .name = "IS25LQ016", + .bustype = BUS_SPI, + .manufacture_id = ISSI_ID_SPI, + .model_id = ISSI_IS25LQ016, + .total_size = 2048, + .page_size = 256, + /* OTP: 1024B total; read 0x4b; write 0xb1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2300, 3600}, + }, + + { + .vendor = "ISSI", .name = "IS25WP032", .bustype = BUS_SPI, .manufacture_id = ISSI_ID_SPI, diff --git a/flashchips.h b/flashchips.h index e5ef390..b5c0aeb 100644 --- a/flashchips.h +++ b/flashchips.h @@ -459,6 +459,7 @@ #define ISSI_IS25LP064 0x6017 #define ISSI_IS25LP128 0x6018 #define ISSI_IS25LP256 0x6019 +#define ISSI_IS25LQ016 0x1445 #define ISSI_IS25WP032 0x7016 #define ISSI_IS25WP064 0x7017 #define ISSI_IS25WP128 0x7018 -- To view, visit https://review.coreboot.org/c/flashrom/+/40431 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I02f19767b8a60fb2d37adab34894b6edb6ac4494 Gerrit-Change-Number: 40431 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Added missing voltages
by Name of user not set (Code Review) 02 Jun '23

02 Jun '23

roman.stingler(a)gmail.com has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/40432 ) Change subject: flashchips: Added missing voltages ...................................................................... flashchips: Added missing voltages Signed-off-by: Roman Stingler <roman.stingler(a)gmail.com> Change-Id: I0825ab11e53c0b018b49173907e2b274a4cf1fab --- M flashchips.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/32/40432/1 diff --git a/flashchips.c b/flashchips.c index b4006df..f2d9fc1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7650,6 +7650,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7677,6 +7678,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7704,6 +7706,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7727,6 +7730,7 @@ .unlock = unlock_28f004s5, .write = write_82802ab, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -7755,6 +7759,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7783,6 +7788,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -9972,6 +9978,7 @@ .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -17550,6 +17557,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -17573,6 +17581,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { -- To view, visit https://review.coreboot.org/c/flashrom/+/40432 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0825ab11e53c0b018b49173907e2b274a4cf1fab Gerrit-Change-Number: 40432 Gerrit-PatchSet: 1 Gerrit-Owner: roman.stingler(a)gmail.com Gerrit-MessageType: newchange

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Change in flashrom[master]: flaschips.c: Fix building with CONFIG_DUMMY=no
by Arthur Heymans (Code Review) 21 Apr '23

21 Apr '23

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/47166 ) Change subject: flaschips.c: Fix building with CONFIG_DUMMY=no ...................................................................... flaschips.c: Fix building with CONFIG_DUMMY=no With CONFIG_DUMMY=yes dummuflasher.c is not linked in so there is definition of probe_variable_size. Change-Id: Ib9bae93fadc55cf133e837e63419da104a6298be Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M flashchips.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/47166/1 diff --git a/flashchips.c b/flashchips.c index 48efb85..1681f42 100644 --- a/flashchips.c +++ b/flashchips.c @@ -19081,3 +19081,7 @@ }; const unsigned int flashchips_size = ARRAY_SIZE(flashchips); + +#if !CONFIG_DUMMY +int probe_variable_size(struct flashctx *flash) { return 0; }; +#endif -- To view, visit https://review.coreboot.org/c/flashrom/+/47166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib9bae93fadc55cf133e837e63419da104a6298be Gerrit-Change-Number: 47166 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in flashrom[master]: buspirate: Add option for setting the aux pin
by Sean Anderson (Code Review) 13 Apr '23

13 Apr '23

Sean Anderson has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/43608 ) Change subject: buspirate: Add option for setting the aux pin ...................................................................... buspirate: Add option for setting the aux pin This adds a parameter to drive the aux pin low (or high if you explicitly want the previous behavior). Some boards need to have a reset pin driven low before the firmware can be safely flashed. With the Bus Pirate, this is most easily done with the auxiliary pin. Change-Id: Ieeecfdf1afc06dadda9b8f99547cd74854ca6775 Signed-off-by: Sean Anderson <seanga2(a)gmail.com> --- M buspirate_spi.c M flashrom.8.tmpl 2 files changed, 33 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/43608/1 diff --git a/buspirate_spi.c b/buspirate_spi.c index fdfc0e4..1ccb107 100644 --- a/buspirate_spi.c +++ b/buspirate_spi.c @@ -228,6 +228,7 @@ int serialspeed_index = -1; int ret = 0; int pullup = 0; + int aux = 1; dev = extract_programmer_param("dev"); if (dev && !strlen(dev)) { @@ -277,6 +278,17 @@ } free(tmp); + tmp = extract_programmer_param("aux"); + if (tmp) { + if (strcasecmp("high", tmp) == 0) + ; /* Default */ + else if (strcasecmp("low", tmp) == 0) + aux = 0; + else + msg_perr("Invalid AUX state, driving high by default.\n"); + } + free(tmp); + /* Default buffer size is 19: 16 bytes data, 3 bytes control. */ #define DEFAULT_BUFSIZE (16 + 3) bp_commbuf = malloc(DEFAULT_BUFSIZE); @@ -520,11 +532,18 @@ } /* Initial setup (SPI peripherals config): Enable power, CS high, AUX */ - bp_commbuf[0] = 0x40 | 0x0b; + bp_commbuf[0] = 0x40 | 0x09; if (pullup == 1) { bp_commbuf[0] |= (1 << 2); msg_pdbg("Enabling pull-up resistors.\n"); } + if (aux) { + bp_commbuf[0] |= (1 << 1); + msg_pdbg("Driving AUX high.\n"); + } else { + msg_pdbg("Driving AUX low.\n"); + } + ret = buspirate_sendrecv(bp_commbuf, 1, 1); if (ret) return 1; diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index db50d59..caf860c 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -902,6 +902,19 @@ .URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_r…" \ "in a guide by dangerousprototypes" . Only the external supply voltage (Vpu) is supported as of this writing. +.sp +An optional aux parameter specifies the state of the Bus Pirate auxiliary pin. +This may be used to drive the auxiliary pin high or low before a transfer. +Syntax is +.sp +.B " flashrom -p buspirate_spi:aux=state" +.sp +where +.B state +can be +.BR high " or " low . +The default +.BR state " is " high . .SS .BR "pickit2_spi " programmer .IP -- To view, visit https://review.coreboot.org/c/flashrom/+/43608 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ieeecfdf1afc06dadda9b8f99547cd74854ca6775 Gerrit-Change-Number: 43608 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Anderson <seanga2(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: cli, manpage: Clean up occurrences of old image argument
by Felix Singer (Code Review) 30 Nov '22

30 Nov '22

Attention is currently required from: Anastasia Klimchuk. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70003 ) Change subject: cli, manpage: Clean up occurrences of old image argument ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/70003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If457e2b8548034868105b515125d7e8b4d5f6134 Gerrit-Change-Number: 70003 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 30 Nov 2022 23:27:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: flashrom: Skip read/write/erase/verify ops on inaccessable flash regions
by Edward O'Callaghan (Code Review) 30 Nov '22

30 Nov '22

Attention is currently required from: Nikolai Artemiev. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70128 ) Change subject: flashrom: Skip read/write/erase/verify ops on inaccessable flash regions ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/70128/comment/d9db1355_797d5fbd PS6, Line 18: S Co-Author? File flashrom.c: https://review.coreboot.org/c/flashrom/+/70128/comment/014b0736_47b3f781 PS6, Line 1082: static int write_flash(st keep this hunk in place of the previous `write_flash()` hunk to make the diff easier to parse/revert. -- To view, visit https://review.coreboot.org/c/flashrom/+/70128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9b96fb04b863625d2c9f9a00b97c35b3ddb0871b Gerrit-Change-Number: 70128 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 30 Nov 2022 23:11:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in flashrom[master]: ichspi: Handle EC region permissions
by Edward O'Callaghan (Code Review) 30 Nov '22

30 Nov '22

Attention is currently required from: Nikolai Artemiev. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70169 ) Change subject: ichspi: Handle EC region permissions ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/70169/comment/eb74055a_8e576b56 PS3, Line 9: WIP. Not sure if we need this. maybe mark the patch as WIP while we validate this to avoid delays on the other patches before this. -- To view, visit https://review.coreboot.org/c/flashrom/+/70169 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ieaf2a960ec0c72d7b576dc3733260592c7c1f766 Gerrit-Change-Number: 70169 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 30 Nov 2022 23:07:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[master]: programmer: Add get_region to spi/opaque masters
by Edward O'Callaghan (Code Review) 30 Nov '22

30 Nov '22

Attention is currently required from: Angel Pons, Nikolai Artemiev. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70126 ) Change subject: programmer: Add get_region to spi/opaque masters ...................................................................... Patch Set 2: Code-Review+1 (1 comment) File include/programmer.h: https://review.coreboot.org/c/flashrom/+/70126/comment/36cc62e1_312bf466 PS2, Line 291: /* TODO: integrate/deduplicate with layout data structures. */ How about including CB:69196 in your series without the two `bool R|W_prot` fields and changing *this* patch on top just to include the two `bool R|W_prot` fields in the struct so the comment in CB:69196 can be resolved. -- To view, visit https://review.coreboot.org/c/flashrom/+/70126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8c43f6b705f36ef18842a04ba6241d3a0b36b232 Gerrit-Change-Number: 70126 Gerrit-PatchSet: 2 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 30 Nov 2022 23:05:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: ichspi: Expose flash descriptor regions through get_region()
by Edward O'Callaghan (Code Review) 30 Nov '22

30 Nov '22

Attention is currently required from: Nikolai Artemiev. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70127 ) Change subject: ichspi: Expose flash descriptor regions through get_region() ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/70127/comment/3f3ee6a2_5f743f85 PS3, Line 24: TEST=todo with this patch focused more on just the hwseq path it will make the testing easier. File ichspi.c: https://review.coreboot.org/c/flashrom/+/70127/comment/77171c68_2d50b803 PS3, Line 300: static struct fd_region fd_regions[MAX_FD_REGIONS] = {{0}}; put this inside `struct hwseq_data` https://review.coreboot.org/c/flashrom/+/70127/comment/9e1c9e76_aa8116fd PS3, Line 1158: fd_regions fetch this out of the master's opaque data field. https://review.coreboot.org/c/flashrom/+/70127/comment/84c4bdcf_c7419677 PS3, Line 1853: fd_regions pass a reference to this in as a argument to the function. https://review.coreboot.org/c/flashrom/+/70127/comment/c3c284bf_ed91e7e3 PS3, Line 1940: .get_region = ich_get_region, Add support for non-hwseq mode in a seperate patch. -- To view, visit https://review.coreboot.org/c/flashrom/+/70127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I019f3f407f6a2a82f686a168457e0e32961ff483 Gerrit-Change-Number: 70127 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 30 Nov 2022 23:00:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in flashrom[master]: [RFC][OTP] spi: add functions for OTP regions
by Sergii Dmytruk (Code Review) 30 Nov '22

30 Nov '22

Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59402 ) Change subject: [RFC][OTP] spi: add functions for OTP regions ...................................................................... Patch Set 25: (1 comment) Patchset: PS25: > Mailing list thread for convenience: https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom. […] Abandoned the series as no one has shown any interest in over 6 months. -- To view, visit https://review.coreboot.org/c/flashrom/+/59402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic33e2c1de8b0ca02df9118218a663ce63826f339 Gerrit-Change-Number: 59402 Gerrit-PatchSet: 25 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 30 Nov 2022 17:06:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: comment

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