Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/46523 )
Change subject: dummyflasher.c: Use programmer logger functions
......................................................................
dummyflasher.c: Use programmer logger functions
All but three log messages use the programmer logger. Change the three
outliers that were using the chip logger accordingly.
Change-Id: Ia8668e05df2da739e6bb4c7d0fddad86e8d054a3
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M dummyflasher.c
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/46523/1
diff --git a/dummyflasher.c b/dummyflasher.c
index 6426ad2..d233db4 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -610,7 +610,7 @@
}
for (i = 0; i < data->spi_ignorelist_size; i++) {
if (writearr[0] == data->spi_ignorelist[i]) {
- msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
+ msg_pdbg("Ignoring ignorelisted SPI command 0x%02x\n",
data->spi_ignorelist[i]);
/* Return success because the command does not fail,
* it is simply ignored.
@@ -1050,7 +1050,7 @@
* Search "total_size * 1024" in code.
*/
flash->chip->total_size = emu_data->emu_chip_size / 1024;
- msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
+ msg_pdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
flash->chip->total_size);
/* Update the first count of each of the block_erasers. */
@@ -1061,7 +1061,7 @@
eraser->eraseblocks[0].count = 1;
eraser->eraseblocks[0].size = emu_data->emu_chip_size;
- msg_cdbg("%s: eraser.size=%d, .count=%d\n",
+ msg_pdbg("%s: eraser.size=%d, .count=%d\n",
__func__, eraser->eraseblocks[0].size,
eraser->eraseblocks[0].count);
}
--
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Gerrit-Change-Id: Ia8668e05df2da739e6bb4c7d0fddad86e8d054a3
Gerrit-Change-Number: 46523
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Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
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Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/46547 )
Change subject: it85spi.c: Kill off dead code system() hack
......................................................................
it85spi.c: Kill off dead code system() hack
This is dead code sitting under a 'if 0' and is
extremely hacky. One could argue this patch perhaps
should include a update to documentation to stop
powerd instead of keeping this rot around?
BUG=none
BRANCH=none
TEST=builds
Change-Id: I5761dea48d553b1334eef3c9cf0ad79cedbd7806
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M it85spi.c
1 file changed, 0 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/47/46547/1
diff --git a/it85spi.c b/it85spi.c
index b998790..1d93a5b 100644
--- a/it85spi.c
+++ b/it85spi.c
@@ -114,15 +114,6 @@
if (it85xx_scratch_rom_reenter > 0)
return;
-#if 0
- /* FIXME: this a workaround for the bug that SMBus signal would
- * interfere the EC firmware update. Should be removed if
- * we find out the root cause. */
- ret = system("stop powerd >&2");
- if (ret)
- msg_perr("Cannot stop powerd.\n");
-#endif
-
for (tries = 0; tries < MAX_TRY; ++tries) {
/* Wait until IBF (input buffer) is not full. */
if (wait_for(KB_IBF, 0, MAX_TIMEOUT,
@@ -165,9 +156,6 @@
static void it85xx_exit_scratch_rom(void)
{
-#if 0
- int ret;
-#endif
int tries;
msg_pdbg("%s():%d was called ...\n", __func__, __LINE__);
@@ -204,15 +192,6 @@
} else {
msg_perr("%s():%d * Max try reached.\n", __func__, __LINE__);
}
-
-#if 0
- /* FIXME: this a workaround for the bug that SMBus signal would
- * interfere the EC firmware update. Should be removed if
- * we find out the root cause. */
- ret = system("start powerd >&2");
- if (ret)
- msg_perr("Cannot start powerd again.\n");
-#endif
}
static int it85xx_shutdown(void *data)
--
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Andy Pont has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48643 )
Change subject: chipset_enable.c: Remove futile attempt to disable lock
......................................................................
chipset_enable.c: Remove futile attempt to disable lock
For all recent Intel chipsets (and possibly others) the ability to
disable the lock fails. This leads to confusing messages being
presented to the user where unlocking fails but the flash update
process works correctly.
Remove the unlock attempt which had alreayd been marked in the source
code comments as "futile".
Signed-off-by: Andy Pont <andy.pont(a)sdcsystems.com>
Change-Id: Id70e132f8feb7b91cbf79d8cdf07744f8763e11b
---
M chipset_enable.c
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/43/48643/1
diff --git a/chipset_enable.c b/chipset_enable.c
index 9205d0e..3ca6ba8 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -333,7 +333,6 @@
wanted |= (1 << 2);
wanted |= (1 << 0); /* Set BIOS Write Enable */
- wanted &= ~(1 << 1); /* Disable lock (futile) */
/* Only write the register if it's necessary */
if (wanted != old) {
--
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Gerrit-Change-Id: Id70e132f8feb7b91cbf79d8cdf07744f8763e11b
Gerrit-Change-Number: 48643
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Gerrit-Owner: Andy Pont <andy.pont(a)sdcsystems.com>
Gerrit-MessageType: newchange
Hello Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/flashrom/+/34629
to review the following change.
Change subject: dediprog: Fix SF600 4BA mode
......................................................................
dediprog: Fix SF600 4BA mode
Flash chips greater than 16MiB require 4BA mode support.
Current master doesn't support such mode as the SF600 uses
PROTOCOL_V3.
Fix protocol version check to support 4BA on PROTOCOL_V3, too.
Tested on SF600 V:7.2.45
Able to read and write "IS25WP256" (32768 kB, SPI).
Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M dediprog.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/34629/1
diff --git a/dediprog.c b/dediprog.c
index 3566109..add478d 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -1160,7 +1160,7 @@
if (dediprog_devicetype == DEV_SF100 && protocol() == PROTOCOL_V1)
spi_master_dediprog.features &= ~SPI_MASTER_NO_4BA_MODES;
- if (protocol() == PROTOCOL_V2)
+ if (protocol() >= PROTOCOL_V2)
spi_master_dediprog.features |= SPI_MASTER_4BA;
if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE))
--
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Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
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Attention is currently required from: Anastasia Klimchuk, Angel Pons, Martin Roth, Raj Astekar, Ravishankar Sarawadi, Wonkyu Kim.
Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58025?usp=email )
Change subject: flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME
......................................................................
Patch Set 7:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/58025/comment/0b7000b9_0f03f689 :
PS6, Line 11: https://www.gigadevice.com/datasheet/gd25lr512me/
> The links are not working anymore. […]
Updated to archive.org links
https://review.coreboot.org/c/flashrom/+/58025/comment/60856779_26ce3c5c :
PS6, Line 17: sudo dut-control cold_reset:on fw_wp_en:off spi2_buf_en:on spi2_buf_on_flex_en:on spi2_vref:pp1800 spi_hold:off
: sudo flashrom -V -p raiden_debug_spi -w <test_binary>
: sudo dut-control spi2_buf_en:off spi2_buf_on_flex_en:off spi2_vref:off spi_hold:off cold_reset:off
> These are probably the commands used by original patch author (which is all good). […]
I only have access to the gd25lr512me chip and flashed with a dediprog. I added my command and got rid of all the unnecessary parts of the original commands.
For flash chips though, I wouldn't think the command line used would matter very much. Does which programmer is used actually matter?
I did actually test reading and erasing form the gd25lr512me chip in addition to just writing though. I did not test any locking functionality however.
Should we add an L to PREW for testing to show that the locking functionality has been verified?
--
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Martin L Roth has uploaded a new patch set (#7) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/flashrom/+/58025?usp=email )
Change subject: flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME
......................................................................
flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME
Datasheets:
https://web.archive.org/web/20210126015138/https://www.gigadevice.com/datas…https://web.archive.org/web/20211023234445/https://www.gigadevice.com/datas…
BUG=none
BRANCH=none
TEST= Flash image using Flashrom Tool
flashrom -p raiden_debug_spi -w <test_binary>
flashrom -p dediprog -w <test_binary>
Change-Id: I2fe6bc1219cd1ee19b93caabab69de938cfc44b0
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
---
M flashchips.c
M include/flashchips.h
2 files changed, 112 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/58025/7
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75906?usp=email )
Change subject: doc: Add new Development guidelines
......................................................................
Patch Set 3:
(10 comments)
Patchset:
PS3:
Thanks a lot everyone for reviews!
I fixed some comments but not all of them, will continue tomorrow.
Also I added some stuff:
Downloading patch from Gerrit
and
Merge checklist
File doc/dev_guide/development_guidelines.rst:
https://review.coreboot.org/c/flashrom/+/75906/comment/441b7b5a_35c18941 :
PS1, Line 5: Intro, is there anything useful to say?
> No idea what to put in an introduction, maybe: […]
Angel this is a good idea, thank you I added your intro!
I also found some good words in "Documentation" page on wiki, added that as well.
File doc/dev_guide/development_guidelines.rst:
https://review.coreboot.org/c/flashrom/+/75906/comment/6c0be7d5_e76efb13 :
PS2, Line 11: *
> This is not displayed as a nested list (and same below). Need to be fixed.
Done
https://review.coreboot.org/c/flashrom/+/75906/comment/26dfd5f0_6800c15b :
PS2, Line 27: Create a commit and sign-off ``git commit -s``.
> This is a good concise summary, but it's kind of confusing with this wording. Perhaps: […]
Done
https://review.coreboot.org/c/flashrom/+/75906/comment/42c3f28b_aa92173d :
PS2, Line 119: *
> Bullet point lists have different indentation in the doc, and rendered with different indentation in […]
Done
https://review.coreboot.org/c/flashrom/+/75906/comment/fb7a58d2_98304c07 :
PS2, Line 141: there
> Remove unnecessary word.
Done
https://review.coreboot.org/c/flashrom/+/75906/comment/a9f0fc57_1dba4482 :
PS2, Line 216: The only official repository is https://review.coreboot.org/flashrom and GitHub and GitLab are just mirrors.
> Slight modification for clarity: […]
Done
https://review.coreboot.org/c/flashrom/+/75906/comment/44ea4c6c_c0725f0b :
PS2, Line 221: sending
: it to review.coreboot.org.
> Link this to the Working With Gerrit heading above?
Done
https://review.coreboot.org/c/flashrom/+/75906/comment/3ee10634_cb64be87 :
PS2, Line 279: Except, if a commit
> The comma seems rather clunky, how about: […]
I actually removed that word "exception". This is not on exception, it's great when people collaborate!
File doc/dev_guide/development_guidelines.rst:
https://review.coreboot.org/c/flashrom/+/75906/comment/626bec9b_fcfb8945 :
PS3, Line 299: :ref:`Team`
This page is under review as well, CB:76075
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Hello Alexander Goncharov, Angel Pons, Edward O'Callaghan, Nikolai Artemiev, Peter Marheine, Stefan Reinauer, Thomas Heijligen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/75906?usp=email
to look at the new patch set (#3).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: doc: Add new Development guidelines
......................................................................
doc: Add new Development guidelines
Change-Id: I7fe9ab2e27fead8e795138294219b11240f15928
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
M doc/contact.rst
A doc/dev_guide/development_guidelines.rst
M doc/dev_guide/index.rst
3 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/06/75906/3
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Change subject: meson: Add support for ni845x_spi on Windows
......................................................................
Patch Set 8: Code-Review+2
(1 comment)
Patchset:
PS8:
Miklos, do you plan to do any more testing with this? Otherwise I am thinking to merge the chain soon-ish.
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