Andy Pont has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48643 )
Change subject: chipset_enable.c: Remove futile attempt to disable lock
......................................................................
chipset_enable.c: Remove futile attempt to disable lock
For all recent Intel chipsets (and possibly others) the ability to
disable the lock fails. This leads to confusing messages being
presented to the user where unlocking fails but the flash update
process works correctly.
Remove the unlock attempt which had alreayd been marked in the source
code comments as "futile".
Signed-off-by: Andy Pont <andy.pont(a)sdcsystems.com>
Change-Id: Id70e132f8feb7b91cbf79d8cdf07744f8763e11b
---
M chipset_enable.c
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/43/48643/1
diff --git a/chipset_enable.c b/chipset_enable.c
index 9205d0e..3ca6ba8 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -333,7 +333,6 @@
wanted |= (1 << 2);
wanted |= (1 << 0); /* Set BIOS Write Enable */
- wanted &= ~(1 << 1); /* Disable lock (futile) */
/* Only write the register if it's necessary */
if (wanted != old) {
--
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Gerrit-Change-Id: Id70e132f8feb7b91cbf79d8cdf07744f8763e11b
Gerrit-Change-Number: 48643
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Gerrit-Owner: Andy Pont <andy.pont(a)sdcsystems.com>
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Hello Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/flashrom/+/34629
to review the following change.
Change subject: dediprog: Fix SF600 4BA mode
......................................................................
dediprog: Fix SF600 4BA mode
Flash chips greater than 16MiB require 4BA mode support.
Current master doesn't support such mode as the SF600 uses
PROTOCOL_V3.
Fix protocol version check to support 4BA on PROTOCOL_V3, too.
Tested on SF600 V:7.2.45
Able to read and write "IS25WP256" (32768 kB, SPI).
Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M dediprog.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/34629/1
diff --git a/dediprog.c b/dediprog.c
index 3566109..add478d 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -1160,7 +1160,7 @@
if (dediprog_devicetype == DEV_SF100 && protocol() == PROTOCOL_V1)
spi_master_dediprog.features &= ~SPI_MASTER_NO_4BA_MODES;
- if (protocol() == PROTOCOL_V2)
+ if (protocol() >= PROTOCOL_V2)
spi_master_dediprog.features |= SPI_MASTER_4BA;
if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE))
--
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Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77530?usp=email )
Change subject: flashchips: Add WP features for Winbond W25X20
......................................................................
Patch Set 1: Code-Review+2
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Gerrit-Change-Number: 77530
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Anton Samsonov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77089?usp=email )
Change subject: Remove dependency on C23 __has_include()
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Thanks for the patch! Can you please provide what compiler and version you used to test this patch? […]
In my understanding, this patch may be needed for all compilers based on legacy versions of EDG frontend, such as version 4.14, which is somewhat on par with GCC 5.5, for example. Those still happen to be used in embedded / certified systems.
Newer EDG versions like 5.1, which is somewhat on par with GCC 7.3, and of course the most recent versions like 6.4, which is somewhat on par with GCC 11.3, do not need this patch already. But those versions are not available on all target platforms.
Do you think such details should be present in commit message?
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Change subject: Remove dependency on C23 __has_include()
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Thanks for the patch! Can you please provide what compiler and version you used to test this patch? It would be great to include that in the commit message.
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Nikolai Artemiev has submitted this change. ( https://review.coreboot.org/c/flashrom/+/75991?usp=email )
Change subject: flashrom: only perform WP unlock for write/erase operations
......................................................................
flashrom: only perform WP unlock for write/erase operations
Don't unlock using WP for read/verify operations because WP will only
disable write locks. Most chips don't have read locks anyway, but some
do, so we still call the chip's unlock function for read/verify
operations.
Unconditionally unlocking using WP slows down flashrom significantly
with some programmers, particularly linux_mtd due to inefficiency in the
current kernel MTD interface.
BUG=b:283779258
BRANCH=none
TEST=`ninja test`
TEST=`flashrom -{r,w,E,v}` on strongbad
TEST=`flashrom --wp-enable; flashrom -{w,E}` on strongbad
Change-Id: I5dc66474a0b7969b51b86ac9f5daa2c95ae968f1
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/75991
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
---
M flashrom.c
1 file changed, 41 insertions(+), 11 deletions(-)
Approvals:
build bot (Jenkins): Verified
Edward O'Callaghan: Looks good to me, approved
diff --git a/flashrom.c b/flashrom.c
index b6e5cf8..630c69d 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -2052,24 +2052,49 @@
return 0;
}
-static int unlock_flash_wp(struct flashctx *const flash)
+static int unlock_flash_wp(struct flashctx *const flash,
+ const bool write_it, const bool erase_it)
+
{
- /* Save original WP state to be restored later */
- if (save_initial_flash_wp(flash))
+ int ret = 0;
+
+ /* WP only disables write protection, so only use WP to unlock
+ * for write/erase operations.
+ *
+ * For read/verify operations, we still call the chip's unlock
+ * function, which may disable read locks if the chip has them.
+ */
+ if (!write_it && !erase_it) {
+ msg_cdbg("Skipping writeprotect-based unlocking for read/verify operations.\n");
return -1;
+ }
+
+ /* Save original WP state to be restored later */
+ if (save_initial_flash_wp(flash)) {
+ ret = -1;
+ goto warn_out;
+ }
/* Disable WP */
struct flashrom_wp_cfg *unlocked_wp_cfg;
- if (flashrom_wp_cfg_new(&unlocked_wp_cfg) != FLASHROM_WP_OK)
- return -1;
+ if (flashrom_wp_cfg_new(&unlocked_wp_cfg) != FLASHROM_WP_OK) {
+ ret = -1;
+ goto warn_out;
+ }
flashrom_wp_set_range(unlocked_wp_cfg, 0, 0);
flashrom_wp_set_mode(unlocked_wp_cfg, FLASHROM_WP_MODE_DISABLED);
- enum flashrom_wp_result ret = flashrom_wp_write_cfg(flash, unlocked_wp_cfg);
+ if (flashrom_wp_write_cfg(flash, unlocked_wp_cfg) != FLASHROM_WP_OK) {
+ ret = -1;
+ }
flashrom_wp_cfg_release(unlocked_wp_cfg);
- return (ret == FLASHROM_WP_OK) ? 0 : -1;
+warn_out:
+ if (ret)
+ msg_cerr("Failed to unlock flash status reg with wp support.\n");
+
+ return ret;
}
int prepare_flash_access(struct flashctx *const flash,
@@ -2092,14 +2117,19 @@
/* Initialize chip_restore_fn_count before chip unlock calls. */
flash->chip_restore_fn_count = 0;
- /* Given the existence of read locks, we want to unlock for read, erase and write. */
int ret = 1;
if (flash->chip->decode_range != NO_DECODE_RANGE_FUNC ||
(flash->mst->buses_supported & BUS_PROG && flash->mst->opaque.wp_write_cfg)) {
- ret = unlock_flash_wp(flash);
- if (ret)
- msg_cerr("Failed to unlock flash status reg with wp support.\n");
+ ret = unlock_flash_wp(flash, write_it, erase_it);
}
+ /*
+ * Fall back to chip unlock function if we haven't already successfully
+ * unlocked using WP (e.g. WP unlocking failed, chip had no WP support,
+ * WP was skipped for read/verify ops).
+ *
+ * Given the existence of read locks, we want to unlock for read,
+ * erase, write, and verify.
+ */
blockprotect_func_t *bp_func = lookup_blockprotect_func_ptr(flash->chip);
if (ret && bp_func)
bp_func(flash);
--
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Gerrit-Change-Number: 75991
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Alexander Goncharov has submitted this change. ( https://review.coreboot.org/c/flashrom/+/77293?usp=email )
Change subject: doc: Fix nesting of About flashrom group of menu items
......................................................................
doc: Fix nesting of About flashrom group of menu items
Adding the title to About flashrom index page allows the engine
to recognise it as a group with a list of menu items inside, which
is as expected.
Without the title on the index page, all menu items inside About
flashrom are inlined into the menu.
Change-Id: I595acc282a536a6d5fa26cf2f8d18dbe549f9716
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/77293
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Alexander Goncharov <chat(a)joursoir.net>
---
M doc/about_flashrom/index.rst
1 file changed, 3 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Alexander Goncharov: Looks good to me, approved
Edward O'Callaghan: Looks good to me, approved
diff --git a/doc/about_flashrom/index.rst b/doc/about_flashrom/index.rst
index 11d845f..de36fc2 100644
--- a/doc/about_flashrom/index.rst
+++ b/doc/about_flashrom/index.rst
@@ -1,3 +1,6 @@
+About flashrom
+==============
+
.. toctree::
:maxdepth: 1
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Change subject: doc: Fix nesting of About flashrom group of menu items
......................................................................
Patch Set 1: Code-Review+2
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