Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/46523 )
Change subject: dummyflasher.c: Use programmer logger functions
......................................................................
dummyflasher.c: Use programmer logger functions
All but three log messages use the programmer logger. Change the three
outliers that were using the chip logger accordingly.
Change-Id: Ia8668e05df2da739e6bb4c7d0fddad86e8d054a3
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M dummyflasher.c
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/46523/1
diff --git a/dummyflasher.c b/dummyflasher.c
index 6426ad2..d233db4 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -610,7 +610,7 @@
}
for (i = 0; i < data->spi_ignorelist_size; i++) {
if (writearr[0] == data->spi_ignorelist[i]) {
- msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
+ msg_pdbg("Ignoring ignorelisted SPI command 0x%02x\n",
data->spi_ignorelist[i]);
/* Return success because the command does not fail,
* it is simply ignored.
@@ -1050,7 +1050,7 @@
* Search "total_size * 1024" in code.
*/
flash->chip->total_size = emu_data->emu_chip_size / 1024;
- msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
+ msg_pdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
flash->chip->total_size);
/* Update the first count of each of the block_erasers. */
@@ -1061,7 +1061,7 @@
eraser->eraseblocks[0].count = 1;
eraser->eraseblocks[0].size = emu_data->emu_chip_size;
- msg_cdbg("%s: eraser.size=%d, .count=%d\n",
+ msg_pdbg("%s: eraser.size=%d, .count=%d\n",
__func__, eraser->eraseblocks[0].size,
eraser->eraseblocks[0].count);
}
--
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Gerrit-Change-Id: Ia8668e05df2da739e6bb4c7d0fddad86e8d054a3
Gerrit-Change-Number: 46523
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Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
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Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/46547 )
Change subject: it85spi.c: Kill off dead code system() hack
......................................................................
it85spi.c: Kill off dead code system() hack
This is dead code sitting under a 'if 0' and is
extremely hacky. One could argue this patch perhaps
should include a update to documentation to stop
powerd instead of keeping this rot around?
BUG=none
BRANCH=none
TEST=builds
Change-Id: I5761dea48d553b1334eef3c9cf0ad79cedbd7806
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M it85spi.c
1 file changed, 0 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/47/46547/1
diff --git a/it85spi.c b/it85spi.c
index b998790..1d93a5b 100644
--- a/it85spi.c
+++ b/it85spi.c
@@ -114,15 +114,6 @@
if (it85xx_scratch_rom_reenter > 0)
return;
-#if 0
- /* FIXME: this a workaround for the bug that SMBus signal would
- * interfere the EC firmware update. Should be removed if
- * we find out the root cause. */
- ret = system("stop powerd >&2");
- if (ret)
- msg_perr("Cannot stop powerd.\n");
-#endif
-
for (tries = 0; tries < MAX_TRY; ++tries) {
/* Wait until IBF (input buffer) is not full. */
if (wait_for(KB_IBF, 0, MAX_TIMEOUT,
@@ -165,9 +156,6 @@
static void it85xx_exit_scratch_rom(void)
{
-#if 0
- int ret;
-#endif
int tries;
msg_pdbg("%s():%d was called ...\n", __func__, __LINE__);
@@ -204,15 +192,6 @@
} else {
msg_perr("%s():%d * Max try reached.\n", __func__, __LINE__);
}
-
-#if 0
- /* FIXME: this a workaround for the bug that SMBus signal would
- * interfere the EC firmware update. Should be removed if
- * we find out the root cause. */
- ret = system("start powerd >&2");
- if (ret)
- msg_perr("Cannot start powerd again.\n");
-#endif
}
static int it85xx_shutdown(void *data)
--
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Andy Pont has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48643 )
Change subject: chipset_enable.c: Remove futile attempt to disable lock
......................................................................
chipset_enable.c: Remove futile attempt to disable lock
For all recent Intel chipsets (and possibly others) the ability to
disable the lock fails. This leads to confusing messages being
presented to the user where unlocking fails but the flash update
process works correctly.
Remove the unlock attempt which had alreayd been marked in the source
code comments as "futile".
Signed-off-by: Andy Pont <andy.pont(a)sdcsystems.com>
Change-Id: Id70e132f8feb7b91cbf79d8cdf07744f8763e11b
---
M chipset_enable.c
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/43/48643/1
diff --git a/chipset_enable.c b/chipset_enable.c
index 9205d0e..3ca6ba8 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -333,7 +333,6 @@
wanted |= (1 << 2);
wanted |= (1 << 0); /* Set BIOS Write Enable */
- wanted &= ~(1 << 1); /* Disable lock (futile) */
/* Only write the register if it's necessary */
if (wanted != old) {
--
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Gerrit-Change-Id: Id70e132f8feb7b91cbf79d8cdf07744f8763e11b
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Gerrit-Owner: Andy Pont <andy.pont(a)sdcsystems.com>
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Hello Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/flashrom/+/34629
to review the following change.
Change subject: dediprog: Fix SF600 4BA mode
......................................................................
dediprog: Fix SF600 4BA mode
Flash chips greater than 16MiB require 4BA mode support.
Current master doesn't support such mode as the SF600 uses
PROTOCOL_V3.
Fix protocol version check to support 4BA on PROTOCOL_V3, too.
Tested on SF600 V:7.2.45
Able to read and write "IS25WP256" (32768 kB, SPI).
Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M dediprog.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/34629/1
diff --git a/dediprog.c b/dediprog.c
index 3566109..add478d 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -1160,7 +1160,7 @@
if (dediprog_devicetype == DEV_SF100 && protocol() == PROTOCOL_V1)
spi_master_dediprog.features &= ~SPI_MASTER_NO_4BA_MODES;
- if (protocol() == PROTOCOL_V2)
+ if (protocol() >= PROTOCOL_V2)
spi_master_dediprog.features |= SPI_MASTER_4BA;
if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE))
--
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Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
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Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/75439?usp=email )
Change subject: doc/classic_cli_manpage: Mark progress feature as experimental
......................................................................
doc/classic_cli_manpage: Mark progress feature as experimental
The feature will have patches coming soon and not completely
ideal yet.
At the moment, read and verify operations can show progress,
erase and write are not completely ready yet.
Change-Id: I9cacc60cb357c29f6625126d22a67a56de560887
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/75439
Reviewed-by: Alexander Goncharov <chat(a)joursoir.net>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
M doc/classic_cli_manpage.rst
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Alexander Goncharov: Looks good to me, approved
Stefan Reinauer: Looks good to me, approved
diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst
index a8ac6da..9a455b0 100644
--- a/doc/classic_cli_manpage.rst
+++ b/doc/classic_cli_manpage.rst
@@ -323,7 +323,7 @@
**--progress**
- Show progress percentage of operations on the standard output.
+ [Experimental feature] Show progress percentage of operations on the standard output.
**-R, --version**
--
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Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75490?usp=email )
Change subject: meson: improve error message for unsupported systems
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
> That will go after CB:75270 right?
I tested it after that, but this can land anytime (there isn't any dependency on other pending changes).
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Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75270?usp=email )
Change subject: doc: Add build instructions for NI-845x on Windows
......................................................................
Patch Set 3:
(1 comment)
File doc/dev_guide/building_from_source.rst:
https://review.coreboot.org/c/flashrom/+/75270/comment/a2c78aaa_ca40b9a7 :
PS1, Line 92: for **32-bit**. Add ``-Dprogrammer=ni845x_spi`` to your meson configuration.
> Ah okay, I have not been aware of that. In this case it is fine for me.
CB:75125 has been merged. So, how about adding information about ni-845x to the `building_with_make` file?
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Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75234?usp=email )
Change subject: Makefile: Simplify the NI-845X detection
......................................................................
Patch Set 3: Code-Review+1
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