November 2018 - flashrom-gerrit

Change in flashrom[master]: chipset_enable.c: Mark Intel PM55 as DEP
by Nico Huber (Code Review) 03 Nov '18

03 Nov '18

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/29437 ) Change subject: chipset_enable.c: Mark Intel PM55 as DEP ...................................................................... chipset_enable.c: Mark Intel PM55 as DEP Tested reading, writing and erasing the internal flash chip using an HP Pavilion dv6-2125ef laptop with an Intel PM55 chipset. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well. Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/29437 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/chipset_enable.c b/chipset_enable.c index c1639a6..cbb88fd 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1801,7 +1801,7 @@ {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, + {0x8086, 0x3b03, DEP, "Intel", "PM55", enable_flash_pch5}, {0x8086, 0x3b06, DEP, "Intel", "H55", enable_flash_pch5}, {0x8086, 0x3b07, DEP, "Intel", "QM57", enable_flash_pch5}, {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, -- To view, visit https://review.coreboot.org/29437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Gerrit-Change-Number: 29437 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: chipset_enable.c: Mark Intel PM55 as DEP
by Nico Huber (Code Review) 03 Nov '18

03 Nov '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/29437 ) Change subject: chipset_enable.c: Mark Intel PM55 as DEP ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/29437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Gerrit-Change-Number: 29437 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 03 Nov 2018 11:33:21 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: chipset_enable.c: Mark Intel PM55 as DEP
by Angel Pons (Code Review) 02 Nov '18

02 Nov '18

Angel Pons has posted comments on this change. ( https://review.coreboot.org/29437 ) Change subject: chipset_enable.c: Mark Intel PM55 as DEP ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/29437/1/chipset_enable.c File chipset_enable.c: https://review.coreboot.org/#/c/29437/1/chipset_enable.c@1804 PS1, Line 1804: "Intel", > please align *slaps self* Done -- To view, visit https://review.coreboot.org/29437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Gerrit-Change-Number: 29437 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 02 Nov 2018 22:55:10 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in flashrom[master]: chipset_enable.c: Mark Intel PM55 as DEP
by Angel Pons (Code Review) 02 Nov '18

02 Nov '18

Hello build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29437 to look at the new patch set (#2). Change subject: chipset_enable.c: Mark Intel PM55 as DEP ...................................................................... chipset_enable.c: Mark Intel PM55 as DEP Tested reading, writing and erasing the internal flash chip using an HP Pavilion dv6-2125ef laptop with an Intel PM55 chipset. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well. Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/29437/2 -- To view, visit https://review.coreboot.org/29437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Gerrit-Change-Number: 29437 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: chipset_enable.c: Mark Intel PM55 as DEP
by Nico Huber (Code Review) 02 Nov '18

02 Nov '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/29437 ) Change subject: chipset_enable.c: Mark Intel PM55 as DEP ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/29437/1/chipset_enable.c File chipset_enable.c: https://review.coreboot.org/#/c/29437/1/chipset_enable.c@1804 PS1, Line 1804: "Intel", please align -- To view, visit https://review.coreboot.org/29437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Gerrit-Change-Number: 29437 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 02 Nov 2018 13:54:29 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in flashrom[master]: chipset_enable.c: Mark Intel PM55 as DEP
by Angel Pons (Code Review) 02 Nov '18

02 Nov '18

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/29437 Change subject: chipset_enable.c: Mark Intel PM55 as DEP ...................................................................... chipset_enable.c: Mark Intel PM55 as DEP Tested reading, writing and erasing the internal flash chip using an HP Pavilion dv6-2125ef laptop with an Intel PM55 chipset. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well. Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/29437/1 diff --git a/chipset_enable.c b/chipset_enable.c index c1639a6..6988a19 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1801,7 +1801,7 @@ {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, + {0x8086, 0x3b03, DEP, "Intel", "PM55", enable_flash_pch5}, {0x8086, 0x3b06, DEP, "Intel", "H55", enable_flash_pch5}, {0x8086, 0x3b07, DEP, "Intel", "QM57", enable_flash_pch5}, {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, -- To view, visit https://review.coreboot.org/29437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I667ea970be11a35b480e0e7c69a1fdf9afa08762 Gerrit-Change-Number: 29437 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>

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Change in flashrom[master]: flashchips: Add Sanyo LE25FU206/A and LE25FU106B
by Nico Huber (Code Review) 01 Nov '18

01 Nov '18

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/28813 ) Change subject: flashchips: Add Sanyo LE25FU206/A and LE25FU106B ...................................................................... flashchips: Add Sanyo LE25FU206/A and LE25FU106B As per user `The_Raven Raven` on the mailing list. Since the added values had some inconsistencies, the chips are marked as untested. Change-Id: I6c26aafdca232110986334e85297d73d513600dc Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/28813 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M flashchips.c M flashchips.h 2 files changed, 103 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index d2a8d77..d85ea74 100644 --- a/flashchips.c +++ b/flashchips.c @@ -11881,6 +11881,106 @@ { .vendor = "Sanyo", + .name = "LE25FU106B", + .bustype = BUS_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FU106B, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = { + /* FIXME: Is this correct? + { + .eraseblocks = { {2 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + },*/ + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, + .unlock = spi_disable_blockprotect_bp1_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2300, 3600}, + }, + + { + .vendor = "Sanyo", + .name = "LE25FU206", + .bustype = BUS_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FU206, + .total_size = 256, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, + .unlock = spi_disable_blockprotect_bp1_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2300, 3600}, + }, + + { + .vendor = "Sanyo", + .name = "LE25FU206A", + .bustype = BUS_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FU206A, + .total_size = 256, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_srwd, + .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2300, 3600}, + }, + + { + .vendor = "Sanyo", .name = "LE25FU406B", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, diff --git a/flashchips.h b/flashchips.h index 434c355..a1b38e0 100644 --- a/flashchips.h +++ b/flashchips.h @@ -612,6 +612,9 @@ #define SANYO_LE25FW406 0x07 /* RES2 */ #define SANYO_LE25FW418A 0x10 /* RES2 and some weird 1 byte RDID variant */ #define SANYO_LE25FW406A 0x1A /* RES2, no datasheet */ +#define SANYO_LE25FU106B 0x1D +#define SANYO_LE25FU206 0x44 +#define SANYO_LE25FU206A 0x0612 #define SANYO_LE25FU406B 0x1E /* LE25FW418A without HD_READ mode option variant */ #define SANYO_LE25FU406C 0x0613 /* Also known as LE25U40CMC apparently */ #define SANYO_LE25FW806 0x26 /* RES2 and some weird 1 byte RDID variant */ -- To view, visit https://review.coreboot.org/28813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I6c26aafdca232110986334e85297d73d513600dc Gerrit-Change-Number: 28813 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: flashchips: Add Sanyo LE25FU206/A and LE25FU106B
by Nico Huber (Code Review) 01 Nov '18

01 Nov '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/28813 ) Change subject: flashchips: Add Sanyo LE25FU206/A and LE25FU106B ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/28813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6c26aafdca232110986334e85297d73d513600dc Gerrit-Change-Number: 28813 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 01 Nov 2018 16:37:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: flashchips: Add Sanyo LE25FU206/A and LE25FU106B
by Angel Pons (Code Review) 01 Nov '18

01 Nov '18

Hello Paul Menzel, build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/28813 to look at the new patch set (#4). Change subject: flashchips: Add Sanyo LE25FU206/A and LE25FU106B ...................................................................... flashchips: Add Sanyo LE25FU206/A and LE25FU106B As per user `The_Raven Raven` on the mailing list. Since the added values had some inconsistencies, the chips are marked as untested. Change-Id: I6c26aafdca232110986334e85297d73d513600dc Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 103 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/28813/4 -- To view, visit https://review.coreboot.org/28813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6c26aafdca232110986334e85297d73d513600dc Gerrit-Change-Number: 28813 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: flashchips: Add Sanyo LE25FU206/A and LE25FU106B
by Angel Pons (Code Review) 01 Nov '18

01 Nov '18

Angel Pons has posted comments on this change. ( https://review.coreboot.org/28813 ) Change subject: flashchips: Add Sanyo LE25FU206/A and LE25FU106B ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/28813/2/flashchips.c File flashchips.c: https://review.coreboot.org/#/c/28813/2/flashchips.c@11632 PS2, Line 11632: .manufacture_id = PMC_ID_NOPREFIX, > Nope, maybe just comment this entry out? Done -- To view, visit https://review.coreboot.org/28813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6c26aafdca232110986334e85297d73d513600dc Gerrit-Change-Number: 28813 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 01 Nov 2018 16:02:50 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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