February 2020 - flashrom-gerrit

Change in flashrom[master]: libflashrom.map: Add missing symbols
by Edward O'Callaghan (Code Review) April 7, 2025

April 7, 2025

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38993 ) Change subject: libflashrom.map: Add missing symbols ...................................................................... libflashrom.map: Add missing symbols The following symbols were missing at link-time from libflashrom: supported_flash_chips; supported_boards; supported_chipsets; Change-Id: I299928d62788c0abfe7f6cdd3e8ad8be0c49e45e Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M libflashrom.map 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/93/38993/1 diff --git a/libflashrom.map b/libflashrom.map index d6dd24d..9430775 100644 --- a/libflashrom.map +++ b/libflashrom.map @@ -25,6 +25,9 @@ flashrom_set_log_callback; flashrom_shutdown; flashrom_supported_programmers; + flashrom_supported_flash_chips; + flashrom_supported_boards; + flashrom_supported_chipsets; flashrom_system_info; flashrom_version_info; local: *; -- To view, visit https://review.coreboot.org/c/flashrom/+/38993 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I299928d62788c0abfe7f6cdd3e8ad8be0c49e45e Gerrit-Change-Number: 38993 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: Add -- to make clean
by Ryan O'Leary (Code Review) Aug. 1, 2024

Aug. 1, 2024

Ryan O'Leary has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37776 ) Change subject: Add -- to make clean ...................................................................... Add -- to make clean Somehow, I ended up with a file name "-c.d". I probably made it by mistake. This change lets "make clean" be a bit more resilient to files such as these. Change-Id: I2517ffac975f3df75f706350a07f189a98a11b7c Signed-off-by: Ryan O'Leary <ryanoleary(a)google.com> --- M Makefile 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/37776/1 diff --git a/Makefile b/Makefile index 518d41b..fa66910 100644 --- a/Makefile +++ b/Makefile @@ -1129,7 +1129,7 @@ # This includes all frontends and libflashrom. # We don't use EXEC_SUFFIX here because we want to clean everything. clean: - rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) + rm -f -- $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) @+$(MAKE) -C util/ich_descriptors_tool/ clean distclean: clean -- To view, visit https://review.coreboot.org/c/flashrom/+/37776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2517ffac975f3df75f706350a07f189a98a11b7c Gerrit-Change-Number: 37776 Gerrit-PatchSet: 1 Gerrit-Owner: Ryan O'Leary <ryanoleary(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: dediprog: Fix SF600 4BA mode
by Patrick Rudolph (Code Review) Nov. 25, 2023

Nov. 25, 2023

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/34629 to review the following change. Change subject: dediprog: Fix SF600 4BA mode ...................................................................... dediprog: Fix SF600 4BA mode Flash chips greater than 16MiB require 4BA mode support. Current master doesn't support such mode as the SF600 uses PROTOCOL_V3. Fix protocol version check to support 4BA on PROTOCOL_V3, too. Tested on SF600 V:7.2.45 Able to read and write "IS25WP256" (32768 kB, SPI). Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M dediprog.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/34629/1 diff --git a/dediprog.c b/dediprog.c index 3566109..add478d 100644 --- a/dediprog.c +++ b/dediprog.c @@ -1160,7 +1160,7 @@ if (dediprog_devicetype == DEV_SF100 && protocol() == PROTOCOL_V1) spi_master_dediprog.features &= ~SPI_MASTER_NO_4BA_MODES; - if (protocol() == PROTOCOL_V2) + if (protocol() >= PROTOCOL_V2) spi_master_dediprog.features |= SPI_MASTER_4BA; if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE)) -- To view, visit https://review.coreboot.org/c/flashrom/+/34629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707 Gerrit-Change-Number: 34629 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: cli_classic: Report the gathered layout entries at level dbg
by Nico Huber (Code Review) Nov. 4, 2022

Nov. 4, 2022

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31012 Change subject: cli_classic: Report the gathered layout entries at level dbg ...................................................................... cli_classic: Report the gathered layout entries at level dbg Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M cli_classic.c M layout.c M layout.h 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/31012/1 diff --git a/cli_classic.c b/cli_classic.c index ced08c6..536ef24 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -645,6 +645,8 @@ goto out_shutdown; } + report_layout(layout); + flashrom_layout_set(fill_flash, layout); flashrom_flag_set(fill_flash, FLASHROM_FLAG_FORCE, !!force); #if CONFIG_INTERNAL == 1 diff --git a/layout.c b/layout.c index fa66238..c589d17 100644 --- a/layout.c +++ b/layout.c @@ -229,3 +229,17 @@ return ret; } + +void report_layout(const struct flashrom_layout *const l) +{ + unsigned int i; + + if (!l) + return; + + msg_gdbg("Gathered %zu layout entries:\n", l->num_entries); + for (i = 0; i < l->num_entries; ++i) { + msg_gdbg("%08"PRIx32":%08"PRIx32" %s\n", + l->entries[i].start, l->entries[i].end, l->entries[i].name); + } +} diff --git a/layout.h b/layout.h index eb54a4f..61311bc 100644 --- a/layout.h +++ b/layout.h @@ -59,4 +59,6 @@ int process_include_args(struct flashrom_layout *); +void report_layout(const struct flashrom_layout *); + #endif /* !__LAYOUT_H__ */ -- To view, visit https://review.coreboot.org/c/flashrom/+/31012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Gerrit-Change-Number: 31012 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: chipset_enable.c: Add Icelake U to known systems
by Mimoja (Code Review) April 13, 2022

April 13, 2022

Mimoja has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37987 ) Change subject: chipset_enable.c: Add Icelake U to known systems ...................................................................... chipset_enable.c: Add Icelake U to known systems Intel Icelake Systems use an (so far) underdescribed 495 Series Chipset that behaves compaitble to pch300 chips. Change-Id: I6227d32f4476420cf1aeec37ebd4b7648e0b3d15 Signed-off-by: Johanna Schander <git(a)mimoja.de> --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/87/37987/1 diff --git a/chipset_enable.c b/chipset_enable.c index e826d90..988720b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2046,6 +2046,7 @@ {0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300}, {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, + {0x8086, 0x3482, B_S, DEP, "Intel", "Icelake U Premium", enable_flash_pch300}, #endif {0}, }; -- To view, visit https://review.coreboot.org/c/flashrom/+/37987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6227d32f4476420cf1aeec37ebd4b7648e0b3d15 Gerrit-Change-Number: 37987 Gerrit-PatchSet: 1 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: hwaccess: Add endianness converting deserialization functions
by Nico Huber (Code Review) April 13, 2022

April 13, 2022

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31016 Change subject: hwaccess: Add endianness converting deserialization functions ...................................................................... hwaccess: Add endianness converting deserialization functions Add functions like uint32_t read_le32(const void *); Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M hwaccess.h 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/16/31016/1 diff --git a/hwaccess.h b/hwaccess.h index af7054b..5df4fc3 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -20,6 +20,7 @@ #ifndef __HWACCESS_H__ #define __HWACCESS_H__ 1 +#include <stdint.h> #include "platform.h" #if NEED_PCI == 1 @@ -109,6 +110,19 @@ #define le_to_cpu32 cpu_to_le32 #define le_to_cpu64 cpu_to_le64 +#define read_from(endianness, bits) \ +static inline uint##bits##_t read_##endianness##bits(const void *from) \ +{ \ + return le_to_cpu##bits(*(uint##bits##_t *)from); \ +} + +read_from(be, 8) +read_from(be, 16) +read_from(be, 32) +read_from(le, 8) +read_from(le, 16) +read_from(le, 32) + #if NEED_RAW_ACCESS == 1 #if IS_X86 -- To view, visit https://review.coreboot.org/c/flashrom/+/31016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Gerrit-Change-Number: 31016 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: chipset_enable.c: Enable Tiger Lake U support
by Edward O'Callaghan (Code Review) April 11, 2022

April 11, 2022

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37777 ) Change subject: chipset_enable.c: Enable Tiger Lake U support ...................................................................... chipset_enable.c: Enable Tiger Lake U support Did a basic local test with --flash-name and -r bios and ran strings to see if the bios contained reasonable data. BUG=b:146089922 Change-Id: I2c13e0173c9b5e17d2ae197f4a4ab9aa2825c1b3 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37777/1 diff --git a/chipset_enable.c b/chipset_enable.c index b55852c..d5a2f03 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1996,6 +1996,7 @@ {0x8086, 0x9d56, B_S, NT, "Intel", "Kaby Lake Y Premium", enable_flash_pch100}, {0x8086, 0x9d58, B_S, NT, "Intel", "Kaby Lake U Premium", enable_flash_pch100}, {0x8086, 0x9d84, B_S, DEP, "Intel", "Cannon Lake U Premium", enable_flash_pch300}, + {0x8086, 0xa082, B_FS, NT, "Intel", "Tiger Lake U", enable_flash_pch300}, {0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100}, {0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100}, {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100}, -- To view, visit https://review.coreboot.org/c/flashrom/+/37777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2c13e0173c9b5e17d2ae197f4a4ab9aa2825c1b3 Gerrit-Change-Number: 37777 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: usbdev: fix accepting shorter serial numbers than the real one.
by Miklós Márton (Code Review) March 16, 2022

March 16, 2022

Miklós Márton has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34641 ) Change subject: usbdev: fix accepting shorter serial numbers than the real one. ...................................................................... usbdev: fix accepting shorter serial numbers than the real one. Change-Id: Ife8c4e0a957c4345e27ec9ae9e1480ca80fe505c --- M usbdev.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/41/34641/1 diff --git a/usbdev.c b/usbdev.c index 764ac04..7e41235 100644 --- a/usbdev.c +++ b/usbdev.c @@ -104,7 +104,8 @@ msg_pdbg("Serial number is %s\n", myserial); /* Filter out any serial number that does not commence with serialno */ - return 0 != strncmp(serialno, (char *)myserial, strlen(serialno)); + return strlen((char *)myserial) == strlen(serialno) + && 0 != strncmp(serialno, (char *)myserial, strlen(serialno)); } struct libusb_device_handle *usb_dev_get_by_vid_pid_serial( -- To view, visit https://review.coreboot.org/c/flashrom/+/34641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ife8c4e0a957c4345e27ec9ae9e1480ca80fe505c Gerrit-Change-Number: 34641 Gerrit-PatchSet: 1 Gerrit-Owner: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add W25Q64.V.M
by Keith Hui (Code Review) Dec. 26, 2021

Dec. 26, 2021

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38578 ) Change subject: flashchips: Add W25Q64.V.M ...................................................................... flashchips: Add W25Q64.V.M Add Winbond W25Q64JV?M SPI flash chip. Some tests were done on a W25Q64JVSSIM mounted on a Sparkfun SOIC-DIP adapter, connected to an Arduino Mega 2560 r3 loaded with frser-duino. Probe and read works, but instability were observed in the connection between Arduino and the chip, so this is being submitted as untested. Datasheet: https://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf Change-Id: Ib7749835178ee6a1b0fe579e7a0c29e69a67933b Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/38578/1 diff --git a/flashchips.c b/flashchips.c index 65dda0e..bfa2927 100644 --- a/flashchips.c +++ b/flashchips.c @@ -16936,6 +16936,46 @@ { .vendor = "Winbond", + .name = "W25Q64.V.M", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q64_V_M, + .total_size = 8192, + .page_size = 256, + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", .name = "W25Q64.W", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, diff --git a/flashchips.h b/flashchips.h index 14ab6de..bdfadad 100644 --- a/flashchips.h +++ b/flashchips.h @@ -938,6 +938,7 @@ #define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */ #define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */ #define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */ +#define WINBOND_NEX_W25Q64_V_M 0x7017 /* W25Q64JVSIM */ #define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ #define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */ -- To view, visit https://review.coreboot.org/c/flashrom/+/38578 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7749835178ee6a1b0fe579e7a0c29e69a67933b Gerrit-Change-Number: 38578 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: freebsd_spi: Use malloc() instead of alloca()
by David Hendricks (Code Review) Oct. 10, 2021

Oct. 10, 2021

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/30765 Change subject: freebsd_spi: Use malloc() instead of alloca() ...................................................................... freebsd_spi: Use malloc() instead of alloca() Change-Id: I03ff2bd1e20bea014333945771b560f17387ebd6 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M freebsd_spi.c 1 file changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/30765/1 diff --git a/freebsd_spi.c b/freebsd_spi.c index 215be20..7514912 100644 --- a/freebsd_spi.c +++ b/freebsd_spi.c @@ -145,7 +145,11 @@ /* FreeBSD uses a single buffer for rx and tx. Allocate a temporary one to avoid overwriting anything. */ size_t tmpcnt = readcnt + writecnt; - unsigned char *tmpbuf = alloca(tmpcnt); + unsigned char *tmpbuf = malloc(tmpcnt); + if (!tmpbuf) { + msg_perr("Out of memory!\n"); + return -1; + } bzero(tmpbuf, tmpcnt); memcpy(tmpbuf, txbuf, writecnt); @@ -164,12 +168,14 @@ if (ioctl(fd, SPIGENIOC_TRANSFER, &msg) == -1) { msg_cerr("%s: ioctl: %s\n", __func__, strerror(errno)); + free(tmpbuf); return -1; } if (rxbuf) memcpy(rxbuf, tmpbuf + writecnt, readcnt); + free(tmpbuf); return 0; } -- To view, visit https://review.coreboot.org/c/flashrom/+/30765 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I03ff2bd1e20bea014333945771b560f17387ebd6 Gerrit-Change-Number: 30765 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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