February 2020 - flashrom-gerrit

Change in flashrom[master]: flashcips: Add Spansion S25FL512S
by Bernhard Urban-Forster (Code Review) 08 Feb '20

08 Feb '20

Bernhard Urban-Forster has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38596 ) Change subject: flashcips: Add Spansion S25FL512S ...................................................................... flashcips: Add Spansion S25FL512S As found on the Tesla AP2.5 board. Based on https://mail.coreboot.org/pipermail/flashrom/2013-June/011066.html Tested with ```console $ flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=16384 -r content.bin ``` Signed-off-by: Bernhard Urban-Forster <lewurm(a)gmail.com> Change-Id: Ifa9b7615951125b6bbc1f051370ef54896bf506c --- M flashchips.c 1 file changed, 36 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/96/38596/1 diff --git a/flashchips.c b/flashchips.c index 65dda0e..f4f6ad7 100644 --- a/flashchips.c +++ b/flashchips.c @@ -15968,6 +15968,42 @@ }, { + .vendor = "Spansion", + .name = "S25FL512S", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL512, + .total_size = 65536, /* 512 Mb (=> 64 MB)) */ + .page_size = 256, + /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_EAR7, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 256 * 1024, 256} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { { 256 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 65536 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */ + .write = spi_chip_write_256, /* Multi I/O supported, IGNORE for now */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "SyncMOS/MoselVitelic", .name = "{F,S,V}29C51001B", .bustype = BUS_PARALLEL, -- To view, visit https://review.coreboot.org/c/flashrom/+/38596 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ifa9b7615951125b6bbc1f051370ef54896bf506c Gerrit-Change-Number: 38596 Gerrit-PatchSet: 1 Gerrit-Owner: Bernhard Urban-Forster <lewurm(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: cli_classic: Add --chip-size command
by David Hendricks (Code Review) 08 Feb '20

08 Feb '20

David Hendricks has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/23346 ) Change subject: cli_classic: Add --chip-size command ...................................................................... Abandoned Made obsolete by CB:35592 -- To view, visit https://review.coreboot.org/c/flashrom/+/23346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia6f334654bea73478f369207e6f4345bcb72e8d4 Gerrit-Change-Number: 23346 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in flashrom[master]: linux_spi: add configurable spimode
by Leonard König (Code Review) 05 Feb '20

05 Feb '20

Leonard König has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38725 ) Change subject: linux_spi: add configurable spimode ...................................................................... linux_spi: add configurable spimode Signed-off-by: Leonard König <leonard.r.koenig(a)googlemail.com> Change-Id: I650cb20efd7a34c5c12bec187e25a4757388dcf8 --- M flashrom.8.tmpl M linux_spi.c 2 files changed, 40 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/38725/1 diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index aa5bcd4..1d0cff8 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -1079,6 +1079,12 @@ .sp .B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000" .sp +Similarly, you can set the SPI mode with the optional +.B spimode +parameter. The mode can be either 0/1/2/3 from the kernel interface, ie. +SPI mode 0 meaning that (CPOL,CPHA) is (0,0), a mode of 1 meaning (0,1), a mode +of 2 (1,0) and a mode of 3 (1,1). +.sp Please note that the linux_spi driver only works on Linux. .SS .BR "mstarddc_spi " programmer diff --git a/linux_spi.c b/linux_spi.c index aa73c18..c890b12 100644 --- a/linux_spi.c +++ b/linux_spi.c @@ -73,9 +73,9 @@ { char *p, *endp, *dev; uint32_t speed_hz = 2 * 1000 * 1000; - /* FIXME: make the following configurable by CLI options. */ /* SPI mode 0 (beware this also includes: MSB first, CS active low and others */ - const uint8_t mode = SPI_MODE_0; + uint8_t mode = SPI_MODE_0; + /* FIXME: make the following configurable by CLI options. */ const uint8_t bits = 8; p = extract_programmer_param("spispeed"); @@ -92,6 +92,38 @@ speed_hz / 1000); } free(p); + p = extract_programmer_param("spimode"); + if (p && strlen(p)) { + unsigned long x = strtoul(p, &endp, 10); + if (p == endp || x > 3 /* SPI_MODE_3 */) { + msg_perr("%s: invalid mode: %s\n", __func__, p); + free(p); + return 1; + } + switch (x) { + case 0: + mode = SPI_MODE_0; + break; + case 1: + mode = SPI_MODE_1; + break; + case 2: + mode = SPI_MODE_2; + break; + case 3: + mode = SPI_MODE_3; + break; + default: + /* unreachable */ + break; + } + } else { + msg_pinfo("Using default %"PRIu8" mode. " + "Use 'spimode' parameter to override.\n", + mode); + } + free(p); + dev = extract_programmer_param("dev"); if (!dev || !strlen(dev)) { -- To view, visit https://review.coreboot.org/c/flashrom/+/38725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I650cb20efd7a34c5c12bec187e25a4757388dcf8 Gerrit-Change-Number: 38725 Gerrit-PatchSet: 1 Gerrit-Owner: Leonard König <leonard.r.koenig(a)googlemail.com> Gerrit-MessageType: newchange

1 1

Change in flashrom[master]: Match -c parameter against patterns in chip names
by Ryan O'Leary (Code Review) 05 Feb '20

05 Feb '20

Ryan O'Leary has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37723 ) Change subject: Match -c parameter against patterns in chip names ...................................................................... Match -c parameter against patterns in chip names This includes patterns such as "EN29GL064H/L", "Am29F002(N)BB" and "A25LQ032/A25LQ32A". This was inspired by a breakage in one of my scripts. The script hard-coded "-c CHIPX". When upstream changed the chip name to "CHIPX/CHIPY", my script broke. By recognizing this pattern, the -c parameter is more resilient to these types of changes. Since an exact match on the whole name takes priority (the current behavior), this should not break anyone's workflow. Change-Id: Iae00bb1108f2d5a0c10977cff63f9348b9fc017f Signed-off-by: Ryan O'Leary <ryanoleary(a)google.com> --- M cli_classic.c 1 file changed, 69 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/37723/1 diff --git a/cli_classic.c b/cli_classic.c index 73cc417..43aac0b 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -103,6 +103,68 @@ return 0; } +/* + * Return 1 if the chip name matches the pattern, otherwise 0. + * + * The pattern may be: + * 1. A single slash followed by a single character. + * Ex: "EN29GL064H/L" matches "EN29GL064H" and "EN29GL064L". + * 2. One character in parens. + * Ex: "Am29F002(N)BB" matches "Am29F002BB" and "Am29F002NBB". + * Ex: "EN29F002(A)(N)B" matches four different chip names. + * 3. A slash-separated list. + * Ex: "A25LQ032/A25LQ32A" matches "A25LQ032" and "A25LQ32A". + * Ex: "MX25L12835F/MX25L12845E/MX25L12865E" matches "MX25L12835F", "MX25L12845E" and "MX25L12865E". + * + * #2 may be nested in #3, for example "W29C010(M)/W29C011A/W29EE011/W29EE012". + */ +static int chip_name_match_pattern(const char *pattern, const char *chip) { + int plen = strlen(pattern); + int clen = strlen(chip); + + if (plen < 3 || clen < 3) { + return 0; + } + + /* Single slash followed by single character. */ + if (pattern[plen-2] == '/') { + for (int pidx = 0; pidx < plen - 2; pidx++) + if (pattern[pidx] == '/') + return 0; + return plen - 2 == clen && + strncmp(pattern, chip, plen - 3) == 0 && + (pattern[plen-1] == chip[clen-1] || + pattern[plen-3] == chip[clen-1]); + } + + int cidx = 0; + for (int pidx = 0; pidx < plen; pidx++) { + if (pattern[pidx] == '/') { + /* Check for termination. */ + if (cidx == clen) + break; + cidx = 0; /* Reset. */ + } else if (pattern[pidx] == '(') { + if (pidx + 2 >= plen || + pattern[pidx+1] == ')' || + pattern[pidx+1] == '(' || + pattern[pidx+2] != ')') + return 0; /* Invalid pattern. */ + if (pattern[pidx+1] == chip[cidx]) + cidx++; + pidx += 2; + } else if (pattern[pidx] == chip[cidx]) { + cidx++; + } else { + /* Reset to next slash. */ + while (pidx < plen && pattern[pidx] != '/') + pidx++; + cidx = 0; + } + } + return cidx == clen; +} + int main(int argc, char *argv[]) { const struct flashchip *chip = NULL; @@ -421,15 +483,22 @@ } /* Does a chip with the requested name exist in the flashchips array? */ if (chip_to_probe) { + /* First check for exact match. */ for (chip = flashchips; chip && chip->name; chip++) if (!strcmp(chip->name, chip_to_probe)) break; + /* Failing that, perform a pattern match. */ + if (!chip || !chip->name) + for (chip = flashchips; chip && chip->name; chip++) + if (chip_name_match_pattern(chip->name, chip_to_probe)) + break; if (!chip || !chip->name) { msg_cerr("Error: Unknown chip '%s' specified.\n", chip_to_probe); msg_gerr("Run flashrom -L to view the hardware supported in this flashrom version.\n"); ret = 1; goto out; } + msg_gdbg("Using chip \"%s\".\n", chip->name); /* Keep chip around for later usage in case a forced read is requested. */ } -- To view, visit https://review.coreboot.org/c/flashrom/+/37723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iae00bb1108f2d5a0c10977cff63f9348b9fc017f Gerrit-Change-Number: 37723 Gerrit-PatchSet: 1 Gerrit-Owner: Ryan O'Leary <ryanoleary(a)google.com> Gerrit-MessageType: newchange

2 1

Change in flashrom[master]: Add .clang-format to help with patch formatting
by Vadim Bendebury (Code Review) 04 Feb '20

04 Feb '20

Vadim Bendebury has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38208 ) Change subject: Add .clang-format to help with patch formatting ...................................................................... Add .clang-format to help with patch formatting This is a copy from the coreboot tree, could be tweaked to better match the flashrom tree if there are any differences. Once this file is in place a script could be deployed which would format only new/changed lines in git patches. Change-Id: I2306f9fa56caca2b1572f55a02c53fe10f51b7ad --- A .clang-format 1 file changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/38208/1 diff --git a/.clang-format b/.clang-format new file mode 100644 index 0000000..5c8aa3c --- /dev/null +++ b/.clang-format @@ -0,0 +1,21 @@ +BasedOnStyle: LLVM +Language: Cpp +IndentWidth: 8 +UseTab: Always +BreakBeforeBraces: Linux +AllowShortIfStatementsOnASingleLine: false +IndentCaseLabels: false +SortIncludes: false +ContinuationIndentWidth: 8 +ColumnLimit: 96 +AlwaysBreakBeforeMultilineStrings: true +AllowShortLoopsOnASingleLine: false +AllowShortFunctionsOnASingleLine: false +AlignEscapedNewlinesLeft: false +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: false +AlignAfterOpenBracket: true +SpaceAfterCStyleCast: false +MaxEmptyLinesToKeep: 2 +BreakBeforeBinaryOperators: NonAssignment +BreakStringLiterals: false -- To view, visit https://review.coreboot.org/c/flashrom/+/38208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2306f9fa56caca2b1572f55a02c53fe10f51b7ad Gerrit-Change-Number: 38208 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-MessageType: newchange

4 7

Change in flashrom[master]: Automatic programmer driver writer
by Carl-Daniel Hailfinger (Code Review) 03 Feb '20

03 Feb '20

Carl-Daniel Hailfinger has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38488 ) Change subject: Automatic programmer driver writer ...................................................................... Automatic programmer driver writer Edit build_new_driver.sh and fill in the properties of the flashrom programmer driver you want to create. Then run ./build_new_driver.sh The driver skeleton will be created in $PROGRAMMERNAME.c.mine Modified versions of existing files will be created with extension .mine You can replace the original files with the modified versions by running for a in *; do test -f $a.mine && mv $a.mine $a; done If you want to use the newly generated skeleton $PROGRAMMERNAME.c.mine , run mv $PROGRAMMERNAME.c.mine $PROGRAMMERNAME.c WARNING: Please note that rerunning build_new_driver.sh will overwrite all *.mine files, but it won't touch $PROGRAMMERNAME.c . If something goes wrong, you can revert all files which look odd and run this script again. TODO: Stefan Tauner suggested to put the configuration into a separate file Change-Id: Icdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcd000001 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- M Makefile A build_new_driver.sh M flashrom.8.tmpl M flashrom.c M meson.build M meson_options.txt M programmer.h 7 files changed, 443 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/88/38488/1 diff --git a/Makefile b/Makefile index 7242b09..3149bb6 100644 --- a/Makefile +++ b/Makefile @@ -696,6 +696,8 @@ # Disable J-Link for now. CONFIG_JLINK_SPI ?= no +#PLACEHOLDER_NEWPROG_DEFAULTCONFIG + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -759,7 +761,9 @@ ifeq ($(CONFIG_OGP_SPI), yes) override CONFIG_BITBANG_SPI = yes else +#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG1 CONFIG_BITBANG_SPI ?= no +#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG2 endif endif endif @@ -996,6 +1000,8 @@ PROGRAMMER_OBJS += mstarddc_spi.o endif +#PLACEHOLDER_NEWPROG_COMPILERULE + ifeq ($(CONFIG_CH341A_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_CH341A_SPI=1' PROGRAMMER_OBJS += ch341a_spi.o diff --git a/build_new_driver.sh b/build_new_driver.sh new file mode 100644 index 0000000..d15e135 --- /dev/null +++ b/build_new_driver.sh @@ -0,0 +1,420 @@ +#!/bin/bash +# flashrom programmer driver skeleton builder. +# Copyright 2012,2020 Carl-Daniel Hailfinger +# Licensed under the GNU GPL v2 +# The license of the generated programmer driver is unrelated to the license +# of this script and can be specified below. + +# Fill in all info in the block below, and don't touch anything else. +# The data provided here is just an example. +# Name of the programmer. Needs to be an all-lowercase valid C identifier. +PROGRAMMERNAME=ezo +# Short description of the programmer. Please do not use / inside the name, it will break the sed expressions. +PROGRAMMERDESCR="EZo+Willem Programmer" +# Name of the programmer manufacturer. +PROGRAMMERMANUF="EZo and Willem" +# Website for the programmer. +PROGRAMMERURL="http://www.ezoflash.com/" +# Fill in your name here. +AUTHORNAME="Carl-Daniel Hailfinger" +# License version of the new programmer driver: 2 or 2+ (for 2+later) +LICENSE_GPL=2 +# Does the programmer need a map/unmap function? +HAVE_MAP=no +# Does the programmer have its own delay function? +HAVE_DELAY=no +# Does the programmer need some sort of direct hardware access? +NEED_PCI=yes +# Does the programmer need some sort of serial port access? +NEED_SERIAL=no +# Is the programmer a PCI device, USB device, or something else? +# You have to specify exactly one of PCI, USB, OTHER +DEVICETYPE=USB +# Note: Usually a programmer only has one of NEED_PARLPCFWH, NEED_SPI or NEED_SPI_BITBANG set to yes. +# Does the programmer use Parallel/LPC/FWH functionality? +NEED_PARLPCFWH=yes +# Which of PARALLEL/LPC/FWH buses does the programer use? FIXME: Explain how to handle multiple buses. +BUS_PARLPCFWH=LPC +# Does the programmer use SPI functionality without bitbanging? FIXME: Check if a SPI bitbanging driver with NEED_SPI=no generates useful code. +NEED_SPI=yes +# Does the programmer use the bitbanging SPI infrastructure? +NEED_SPI_BITBANG=yes + +# No user serviceable parts below. +unset LANG +unset LANGUAGE +unset LC_COLLATE +if test $LICENSE_GPL = 2; then + GPLV3EITHER= + GPLV3OR= +elif test $LICENSE_GPL = 2+; then + GPLV3EITHER="either" + GPLV3OR="\n * (at your option) any later version" +else + echo "Specified license can not be handled automatically" + exit 1 +fi +if test $HAVE_MAP = yes; then MAPNAME=$PROGRAMMERNAME; else MAPNAME=fallback; fi +if test $HAVE_DELAY = yes; then DELAYNAME=$PROGRAMMERNAME; else DELAYNAME=internal; fi +PROGRAMMERNAMECAPS=$(echo -n $PROGRAMMERNAME|tr "[[:lower:]]" "[[:upper:]]") +CONFIGNAME=CONFIG_$PROGRAMMERNAMECAPS +ENUMNAME=PROGRAMMER_$PROGRAMMERNAMECAPS +if test $NEED_PCI = yes; then NEEDS="NEED_PCI := yes\n"; fi +if test $NEED_SERIAL = yes; then NEEDS+="NEED_SERIAL := yes\n"; fi + +sed "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY-\ +#if ${CONFIGNAME} == 1\n\ + {\n\ + .name = \"${PROGRAMMERNAME}\",\n\ +\0-" flashrom.c >flashrom.c.mine +if test $DEVICETYPE = OTHER; then +sed "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY-\ + .type = OTHER,\n\ + .devs.note = \"Textual list of usable devices\\\\n\",\n\ +\0-" flashrom.c.mine >flashrom.c.mine1 +mv flashrom.c.mine1 flashrom.c.mine +else +sed "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY-\ + .type = ${DEVICETYPE},\n\ + .devs.dev = devs_${PROGRAMMERNAME},\n\ +\0-" flashrom.c.mine >flashrom.c.mine1 +mv flashrom.c.mine1 flashrom.c.mine +fi +sed "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY-\ + .init = ${PROGRAMMERNAME}_init,\n\ + .map_flash_region = ${MAPNAME}_map,\n\ + .unmap_flash_region = ${MAPNAME}_unmap,\n\ + .delay = ${DELAYNAME}_delay,\n\ + },\n\ +#endif\n\ +\n\0-" flashrom.c.mine >flashrom.c.mine1 +mv flashrom.c.mine1 flashrom.c.mine + +sed -e "s/^#PLACEHOLDER_NEWPROG_DEFAULTCONFIG/\ +# Enable ${PROGRAMMERDESCR} for now.\n\ +${CONFIGNAME} ?= yes\n\ +\n\0/" \ +-e "s/^#PLACEHOLDER_NEWPROG_COMPILERULE/\ +ifeq (\$(${CONFIGNAME}), yes)\n\ +FEATURE_CFLAGS += -D'${CONFIGNAME}=1'\n\ +PROGRAMMER_OBJS += ${PROGRAMMERNAME}.o\n\ +${NEEDS}\ +endif\n\ +\n\0/" Makefile >Makefile.mine + +if test $NEED_SPI_BITBANG = yes; then +sed -e "s/^#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG1/\ +ifeq (\$(${CONFIGNAME}), yes)\n\ +override CONFIG_BITBANG_SPI = yes\n\ +else\n\ +\0/" \ +-e "s/^#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG2/\ +\0\n\ +endif/;" Makefile.mine >Makefile.mine1 +mv Makefile.mine1 Makefile.mine +fi + +sed -e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUM-\ +#if ${CONFIGNAME} == 1\n\ + ${ENUMNAME},\n\ +#endif\n\ +\0-" \ +-e "s-^//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS-\ +/* ${PROGRAMMERNAME}.c */\n\ +#if ${CONFIGNAME} == 1\n\ +int ${PROGRAMMERNAME}_init(void);\n\ +\0-" programmer.h >programmer.h.mine + +if test $DEVICETYPE = PCI -o $DEVICETYPE = USB; then +sed -e "s-^//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS-\ +extern const struct dev_entry devs_${PROGRAMMERNAME}[];\n\ +\n\0-" programmer.h.mine >programmer.h.mine1 +mv programmer.h.mine1 programmer.h.mine +fi + +sed -e "s-^//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS-\ +#endif\n\ +\n\0-" programmer.h.mine >programmer.h.mine1 +mv programmer.h.mine1 programmer.h.mine + +if test $NEED_SPI_BITBANG = yes; then +sed -e "s-//PLACEHOLDER_NEWPROG_SELECT_SPI_BITBANG\$-\ +|| ${CONFIGNAME} == 1 \0-" programmer.h.mine >programmer.h.mine1 +mv programmer.h.mine1 programmer.h.mine +fi + +# No idea if roff supports hidden comments. Hook up to hopefully unchanged sequences. +sed -e "s/.*PLACEHOLDER_NEWPROG_MAN_SHORTDESCRIPTION/\ +.BR \"* ${PROGRAMMERNAME}\" \" (${PROGRAMMERDESCR})\"\n\ +.sp\n\ +\0/" \ +-e "s/.*PLACEHOLDER_NEWPROG_MAN_LONGDESCRIPTION/\ +.SS\n\ +.BR \"${PROGRAMMERNAME} \" programmer\n\ +Please describe the programmer parameters here.\n\ +\0/" \ +-e "s/.*PLACEHOLDER_NEWPROG_MAN_REQUIREMENTS/\ +.B ${PROGRAMMERNAME}\n\ +Please describe the programmer requirements here.\n\ +.sp\n\ +\0/" flashrom.8.tmpl > flashrom.8.tmpl.mine + +cat >$PROGRAMMERNAME.c.mine <<EOF +/* + * This file is part of the flashrom project. + * + * Copyright (C) $(date +%Y) ${AUTHORNAME} + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; ${GPLV3EITHER}version 2 of the License${GPLV3OR}. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Driver for the ${PROGRAMMERDESCR} hardware by ${PROGRAMMERMANUF}. + * See ${PROGRAMMERURL} for more info. + */ + +#include "flash.h" +#include "programmer.h" + +EOF + +if test $DEVICETYPE = PCI -o $DEVICETYPE = USB; then +cat >>$PROGRAMMERNAME.c.mine <<EOF +const struct dev_entry devs_${PROGRAMMERNAME}[] = { + {0xdead, 0xbeef, NT, "Vendor name", "Device name"}, + + {0}, +}; + +EOF +fi + +if test $NEED_PARLPCFWH = yes; then +cat >>$PROGRAMMERNAME.c.mine <<EOF +static void ${PROGRAMMERNAME}_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) +{ + /* Write a byte to the flash chip. */ +} + +static uint8_t ${PROGRAMMERNAME}_chip_readb(const struct flashctx *flash, const chipaddr addr) +{ + /* Read a byte from the flash chip and return it. */ + /* Set it to 0xff to get the template to compile. */ + uint8_t val = 0xff; + + return val; +} + +static const struct par_programmer par_programmer_${PROGRAMMERNAME} = { + .chip_readb = ${PROGRAMMERNAME}_chip_readb, + /* If your programmer supports word/long accesses, change the lines below. */ + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = ${PROGRAMMERNAME}_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +EOF +fi + +if test $NEED_SPI_BITBANG = yes; then +cat >>$PROGRAMMERNAME.c.mine <<EOF +static void ${PROGRAMMERNAME}_bitbang_set_cs(int val) +{ + /* Set/clear the CS# line. */ +} + +static void ${PROGRAMMERNAME}_bitbang_set_sck(int val) +{ + /* Set/clear the SCLK line. */ +} + +static void ${PROGRAMMERNAME}_bitbang_set_mosi(int val) +{ + /* Set/clear the MOSI line. */ +} + +static int ${PROGRAMMERNAME}_bitbang_get_miso(void) +{ + /* Get the state of the MISO line and return it. */ + /* Set it to 1 to get the template to compile. */ + int misoval = 1; + + return misoval; +} + +/* If this programmer does not support requesting/releasing the SPI bus, remove + * the functions ${PROGRAMMERNAME}_request_spibus and ${PROGRAMMERNAME}_release_spibus + * and set bitbang_spi_master_${PROGRAMMERNAME} members .request_bus and .release_bus + * to NULL. + */ +static void ${PROGRAMMERNAME}_request_spibus(void) +{ +} + +static void ${PROGRAMMERNAME}_release_spibus(void) +{ +} + +static const struct bitbang_spi_master bitbang_spi_master_${PROGRAMMERNAME} = { + .set_cs = ${PROGRAMMERNAME}_bitbang_set_cs, + .set_sck = ${PROGRAMMERNAME}_bitbang_set_sck, + .set_mosi = ${PROGRAMMERNAME}_bitbang_set_mosi, + .get_miso = ${PROGRAMMERNAME}_bitbang_get_miso, + .request_bus = ${PROGRAMMERNAME}_request_spibus, + .release_bus = ${PROGRAMMERNAME}_release_spibus, + .half_period = 1, /* Delay in microseconds before each SCLK level change. */ +}; + +EOF +fi + +if test $NEED_SPI = yes; then +cat >>$PROGRAMMERNAME.c.mine <<EOF +/* Include string.h for memset to get the template to compile. Remove this. */ +#include <string.h> +static int ${PROGRAMMERNAME}_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) +{ + /* Send a SPI command to the flash chip. */ + /* Set readarr to 0xff to get the template to compile and run without segfaults. */ + memset(readarr, 0xff, readcnt); + + return 0; +} + +static const struct spi_master spi_master_${PROGRAMMERNAME} = { + .max_data_read = 64 * 1024, /* Maximum data read size in one go (excluding opcode+address). */ + .max_data_write = 256, /* Maximum data write size in one go (excluding opcode+address). */ + .command = ${PROGRAMMERNAME}_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +EOF +fi + +cat >>$PROGRAMMERNAME.c.mine <<EOF +static int ${PROGRAMMERNAME}_shutdown(void *data) +{ + /* Shutdown stuff. */ + return 0; +} + +int ${PROGRAMMERNAME}_init(void) +{ + /* Init stuff (i.e. parameter parsing) here which does not need to be + * undone. + */ + + /* If your shutdown function takes a parameter, replace NULL with it. */ + register_shutdown(${PROGRAMMERNAME}_shutdown, NULL); + + /* Init stuff which needs to be undone on shutdown. */ + +EOF + +if test $NEED_SPI_BITBANG = yes; then +cat >>$PROGRAMMERNAME.c.mine <<EOF + /* 1 usec halfperiod delay, change as needed. */ + if (bitbang_spi_init(&bitbang_spi_master_${PROGRAMMERNAME})) + return 1; + +EOF +fi + +if test $NEED_SPI = yes; then +cat >>$PROGRAMMERNAME.c.mine <<EOF + register_spi_master(&spi_master_${PROGRAMMERNAME}); + +EOF +fi + +if test $NEED_PARLPCFWH = yes; then +cat >>$PROGRAMMERNAME.c.mine <<EOF + register_par_programmer(&par_programmer_${PROGRAMMERNAME}, BUS_${BUS_PARLPCFWH}); + +EOF +fi + +cat >>$PROGRAMMERNAME.c.mine <<EOF + return 0; +} +EOF + +csplit -f .newmeson_options meson_options.txt "/#PLACEHOLDER_NEWPROG_MESON_OPTION_START/+1" "/#PLACEHOLDER_NEWPROG_MESON_OPTION_END/" +echo "option('config_${PROGRAMMERNAME}', type : 'boolean', value : true, description : '${PROGRAMMERDESCR}')" >>.newmeson_options01 +sort .newmeson_options01 >.newmeson_options03 +cat .newmeson_options00 .newmeson_options03 .newmeson_options02 >meson_options.txt.mine +rm .newmeson_options00 .newmeson_options01 .newmeson_options02 .newmeson_options03 + +csplit -f .newmeson meson.build "/#PLACEHOLDER_NEWPROG_MESON_CONFIGFETCH_START/+1" "/#PLACEHOLDER_NEWPROG_MESON_CONFIGFETCH_END/" +echo "config_${PROGRAMMERNAME} = get_option('config_${PROGRAMMERNAME}')" >>.newmeson01 +sort .newmeson01 >.newmeson03 +cat .newmeson00 .newmeson03 .newmeson02 >.newmeson.build.mine +rm .newmeson00 .newmeson01 .newmeson02 .newmeson03 + +if test $DEVICETYPE = PCI ; then + csplit -f .newmeson .newmeson.build.mine "/#PLACEHOLDER_NEWPROG_MESON_PCI_REQUIREMENT_MISSING_START/+1" "/#PLACEHOLDER_NEWPROG_MESON_PCI_REQUIREMENT_MISSING_END/" + echo " config_${PROGRAMMERNAME} = false" >>.newmeson01 + sort .newmeson01 >.newmeson03 + cat .newmeson00 .newmeson03 .newmeson02 >.newmeson.build.mine + rm .newmeson00 .newmeson01 .newmeson02 .newmeson03 +fi + +if test $DEVICETYPE = USB ; then + csplit -f .newmeson .newmeson.build.mine "/#PLACEHOLDER_NEWPROG_MESON_USB_REQUIREMENT_MISSING_START/+1" "/#PLACEHOLDER_NEWPROG_MESON_USB_REQUIREMENT_MISSING_END/" + echo " config_${PROGRAMMERNAME} = false" >>.newmeson01 + sort .newmeson01 >.newmeson03 + cat .newmeson00 .newmeson03 .newmeson02 >.newmeson.build.mine + rm .newmeson00 .newmeson01 .newmeson02 .newmeson03 +fi + +csplit -f .newmeson .newmeson.build.mine "/#PLACEHOLDER_NEWPROG_MESON_FILES_DEFINES_NEEDS_START/+1" "/#PLACEHOLDER_NEWPROG_MESON_FILES_DEFINES_NEEDS_END/" +# FIXME: The current meson.build always builds the PCI intrastructure unless explicitly disabled. +cat >>.newmeson01 <<EOF +if config_${PROGRAMMERNAME} + srcs += '${PROGRAMMERNAME}.c' + cargs += '-D${CONFIGNAME}=1' +EOF +if $NEED_SERIAL = yes; then + cat >>.newmeson01 <<EOF + need_serial = true +EOF +cat >>.newmeson01 <<EOF +endif +EOF +# FIXME: Sorting is a bit more complicated here. Skip it for now. +cat .newmeson00 .newmeson01 .newmeson02 >.newmeson.build.mine +rm .newmeson00 .newmeson01 .newmeson02 + +mv .newmeson.build.mine meson.build.mine + +echo "The driver skeleton has been created in $PROGRAMMERNAME.c.mine" +echo "Modified versions of existing files have been created with extension .mine" +echo "You can replace the original files with the modified versions by running" +echo "for a in *; do test -f \$a.mine && mv \$a.mine \$a; done" +echo "If you want to use the newly generated skeleton $PROGRAMMERNAME.c.mine , run" +echo "mv $PROGRAMMERNAME.c.mine $PROGRAMMERNAME.c" +echo +echo "WARNING: Please note that rerunning build_new_driver.sh will overwrite" +echo "all *.mine files, but it won't touch $PROGRAMMERNAME.c ." +echo "If something goes wrong, you can revert all files which look odd and" +echo "run this script again." diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index aa5bcd4..b28c86a 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -345,6 +345,7 @@ .sp .BR "* stlinkv3_spi" " (for SPI flash ROMs attached to STMicroelectronics STLINK V3 devices)" .sp +.\"PLACEHOLDER_NEWPROG_MAN_SHORTDESCRIPTION Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER-SPECIFIC INFORMATION @@ -1287,7 +1288,7 @@ If the passed frequency is not supported by the adapter the nearest lower supported frequency will be used. .SS - +.\"PLACEHOLDER_NEWPROG_MAN_LONGDESCRIPTION .SH EXAMPLES To back up and update your BIOS, run .sp @@ -1365,6 +1366,7 @@ .B ogp needs PCI configuration space read access and raw memory access. .sp +.\"PLACEHOLDER_NEWPROG_MAN_REQUIREMENTS On OpenBSD, you can obtain raw access permission by setting .B "securelevel=-1" in diff --git a/flashrom.c b/flashrom.c index e540027..ad8b23e 100644 --- a/flashrom.c +++ b/flashrom.c @@ -473,6 +473,7 @@ }, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY {0}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; diff --git a/meson.build b/meson.build index 375089c..c602399 100644 --- a/meson.build +++ b/meson.build @@ -30,6 +30,7 @@ add_project_arguments('-DFLASHROM_VERSION="' + meson.project_version() + '"', language : 'c') # get defaults from configure +# PLACEHOLDER_NEWPROG_MESON_CONFIGFETCH_START config_atahpt = get_option('config_atahpt') config_atapromise = get_option('config_atapromise') config_atavia = get_option('config_atavia') @@ -62,6 +63,7 @@ config_serprog = get_option('config_serprog') config_usbblaster_spi = get_option('config_usbblaster_spi') config_stlinkv3_spi = get_option('config_stlinkv3_spi') +# PLACEHOLDER_NEWPROG_MESON_CONFIGFETCH_END cargs = [] deps = [] @@ -86,11 +88,13 @@ srcs += 'usbdev.c' deps += dependency('libusb-1.0') else +# PLACEHOLDER_NEWPROG_MESON_USB_REQUIREMENT_MISSING_START config_ch341a_spi = false config_dediprog = false config_digilent_spi = false config_developerbox_spi = false config_pickit2_spi = false +# PLACEHOLDER_NEWPROG_MESON_USB_REQUIREMENT_MISSING_END endif # some programmers require libpci @@ -99,6 +103,7 @@ deps += dependency('libpci') cargs += '-DNEED_PCI=1' else +# PLACEHOLDER_NEWPROG_MESON_PCI_REQUIREMENT_MISSING_START config_atahpt = false config_atapromise = false config_atavia = false @@ -116,9 +121,11 @@ config_rayer_spi = false config_satamv = false config_satasii = false +# PLACEHOLDER_NEWPROG_MESON_PCI_REQUIREMENT_MISSING_END endif # set defines for configured programmers +# PLACEHOLDER_NEWPROG_MESON_FILES_DEFINES_NEEDS_START if config_atahpt srcs += 'atahpt.c' cargs += '-DCONFIG_ATAHPT=1' @@ -276,6 +283,7 @@ srcs += 'stlinkv3_spi.c' cargs += '-DCONFIG_STLINKV3_SPI=1' endif +# PLACEHOLDER_NEWPROG_MESON_FILES_DEFINES_NEEDS_END # bitbanging SPI infrastructure if config_bitbang_spi diff --git a/meson_options.txt b/meson_options.txt index b7633d0..9e47272 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -1,6 +1,7 @@ option('pciutils', type : 'boolean', value : true, description : 'use pciutils') option('usb', type : 'boolean', value : true, description : 'use libusb1') +#PLACEHOLDER_NEWPROG_MESON_OPTION_START option('config_atahpt', type : 'boolean', value : false, description : 'Highpoint (HPT) ATA/RAID controllers') option('config_atapromise', type : 'boolean', value : false, description : 'Promise ATA controller') option('config_atavia', type : 'boolean', value : true, description : 'VIA VT6421A LPC memory') @@ -33,3 +34,4 @@ option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA controllers') option('config_serprog', type : 'boolean', value : true, description : 'serprog') option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') +#PLACEHOLDER_NEWPROG_MESON_OPTION_END diff --git a/programmer.h b/programmer.h index 3cf53b9..90afc7b 100644 --- a/programmer.h +++ b/programmer.h @@ -127,6 +127,7 @@ #if CONFIG_STLINKV3_SPI == 1 PROGRAMMER_STLINKV3_SPI, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUM PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -573,6 +574,8 @@ int ni845x_spi_init(void); #endif +//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS + /* flashrom.c */ struct decode_sizes { uint32_t parallel; -- To view, visit https://review.coreboot.org/c/flashrom/+/38488 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Icdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcd000001 Gerrit-Change-Number: 38488 Gerrit-PatchSet: 1 Gerrit-Owner: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Gerrit-MessageType: newchange

4 12

Change in flashrom[master]: meson_options.txt: Align with tabs
by Angel Pons (Code Review) 03 Feb '20

03 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38662 ) Change subject: meson_options.txt: Align with tabs ...................................................................... meson_options.txt: Align with tabs Aligned text clearly shows that all options use the same format. Change-Id: Idf0881859416e3d824228a0f78447da0bf8604b2 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M meson_options.txt 1 file changed, 35 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/38662/1 diff --git a/meson_options.txt b/meson_options.txt index ea87311..f81e605 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -1,36 +1,36 @@ -option('pciutils', type : 'boolean', value : true, description : 'use pciutils') -option('usb', type : 'boolean', value : true, description : 'use libusb1') +option('pciutils', type : 'boolean', value : true, description : 'use pciutils') +option('usb', type : 'boolean', value : true, description : 'use libusb1') -option('config_atahpt', type : 'boolean', value : false, description : 'Highpoint (HPT) ATA/RAID controllers') -option('config_atapromise', type : 'boolean', value : false, description : 'Promise ATA controller') -option('config_atavia', type : 'boolean', value : true, description : 'VIA VT6421A LPC memory') -option('config_buspirate_spi', type : 'boolean', value : true, description : 'Bus Pirate SPI') -option('config_ch341a_spi', type : 'boolean', value : true, description : 'Winchiphead CH341A') -option('config_dediprog', type : 'boolean', value : true, description : 'Dediprog SF100') -option('config_developerbox_spi', type : 'boolean', value : true, description : 'Developerbox emergency recovery') -option('config_digilent_spi', type : 'boolean', value : true, description : 'Digilent Development board JTAG') -option('config_drkaiser', type : 'boolean', value : true, description : 'Dr. Kaiser') -option('config_dummy', type : 'boolean', value : true, description : 'dummy tracing') -option('config_ft2232_spi', type : 'boolean', value : true, description : 'FT2232 SPI dongles') -option('config_gfxnvidia', type : 'boolean', value : true, description : 'NVIDIA graphics cards') -option('config_internal', type : 'boolean', value : true, description : 'internal/onboard') -option('config_internal_dmi', type : 'boolean', value : true, description : 'Use internal DMI parser') -option('config_it8212', type : 'boolean', value : true, description : 'ITE IT8212F PATA') -option('config_linux_mtd', type : 'boolean', value : true, description : 'Linux MTD interfaces') -option('config_linux_spi', type : 'boolean', value : true, description : 'Linux spidev interfaces') -option('config_mstarddc_spi', type : 'boolean', value : false, description : 'MSTAR DDC support') -option('config_nic3com', type : 'boolean', value : true, description : '3Com NICs') -option('config_nicintel_eeprom', type : 'boolean', value : true, description : 'EEPROM on Intel NICs') -option('config_nicintel_spi', type : 'boolean', value : true, description : 'SPI on Intel NICs') -option('config_nicintel', type : 'boolean', value : true, description : 'Intel NICs') -option('config_nicnatsemi', type : 'boolean', value : false, description : 'National Semiconductor NICs') -option('config_nicrealtek', type : 'boolean', value : true, description : 'Realtek NICs') -option('config_ogp_spi', type : 'boolean', value : true, description : 'SPI on OGP cards') -option('config_pickit2_spi', type : 'boolean', value : true, description : 'PICkit2 SPI') -option('config_pony_spi', type : 'boolean', value : true, description : 'PonyProg2000 SPI') -option('config_rayer_spi', type : 'boolean', value : true, description : 'RayeR SPIPGM') -option('config_satamv', type : 'boolean', value : true, description : 'Marvell SATA controllers') -option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA controllers') -option('config_serprog', type : 'boolean', value : true, description : 'serprog') -option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') -option('config_stlinkv3_spi', type : 'boolean', value : true, description : 'STMicroelectronics STLINK-V3') +option('config_atahpt', type : 'boolean', value : false, description : 'Highpoint (HPT) ATA/RAID controllers') +option('config_atapromise', type : 'boolean', value : false, description : 'Promise ATA controller') +option('config_atavia', type : 'boolean', value : true, description : 'VIA VT6421A LPC memory') +option('config_buspirate_spi', type : 'boolean', value : true, description : 'Bus Pirate SPI') +option('config_ch341a_spi', type : 'boolean', value : true, description : 'Winchiphead CH341A') +option('config_dediprog', type : 'boolean', value : true, description : 'Dediprog SF100') +option('config_developerbox_spi', type : 'boolean', value : true, description : 'Developerbox emergency recovery') +option('config_digilent_spi', type : 'boolean', value : true, description : 'Digilent Development board JTAG') +option('config_drkaiser', type : 'boolean', value : true, description : 'Dr. Kaiser') +option('config_dummy', type : 'boolean', value : true, description : 'dummy tracing') +option('config_ft2232_spi', type : 'boolean', value : true, description : 'FT2232 SPI dongles') +option('config_gfxnvidia', type : 'boolean', value : true, description : 'NVIDIA graphics cards') +option('config_internal', type : 'boolean', value : true, description : 'internal/onboard') +option('config_internal_dmi', type : 'boolean', value : true, description : 'Use internal DMI parser') +option('config_it8212', type : 'boolean', value : true, description : 'ITE IT8212F PATA') +option('config_linux_mtd', type : 'boolean', value : true, description : 'Linux MTD interfaces') +option('config_linux_spi', type : 'boolean', value : true, description : 'Linux spidev interfaces') +option('config_mstarddc_spi', type : 'boolean', value : false, description : 'MSTAR DDC support') +option('config_nic3com', type : 'boolean', value : true, description : '3Com NICs') +option('config_nicintel_eeprom', type : 'boolean', value : true, description : 'EEPROM on Intel NICs') +option('config_nicintel_spi', type : 'boolean', value : true, description : 'SPI on Intel NICs') +option('config_nicintel', type : 'boolean', value : true, description : 'Intel NICs') +option('config_nicnatsemi', type : 'boolean', value : false, description : 'National Semiconductor NICs') +option('config_nicrealtek', type : 'boolean', value : true, description : 'Realtek NICs') +option('config_ogp_spi', type : 'boolean', value : true, description : 'SPI on OGP cards') +option('config_pickit2_spi', type : 'boolean', value : true, description : 'PICkit2 SPI') +option('config_pony_spi', type : 'boolean', value : true, description : 'PonyProg2000 SPI') +option('config_rayer_spi', type : 'boolean', value : true, description : 'RayeR SPIPGM') +option('config_satamv', type : 'boolean', value : true, description : 'Marvell SATA controllers') +option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA controllers') +option('config_serprog', type : 'boolean', value : true, description : 'serprog') +option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') +option('config_stlinkv3_spi', type : 'boolean', value : true, description : 'STMicroelectronics STLINK-V3') -- To view, visit https://review.coreboot.org/c/flashrom/+/38662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idf0881859416e3d824228a0f78447da0bf8604b2 Gerrit-Change-Number: 38662 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

4 10

Change in flashrom[master]: meson: Sort options alphabetically
by Angel Pons (Code Review) 03 Feb '20

03 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38668 ) Change subject: meson: Sort options alphabetically ...................................................................... meson: Sort options alphabetically Treat them as C-strings, so that `nicintel` goes before `nicintel-spi`. Change-Id: I77f97dc8ba0cfb2bec38342a80ace7b98ed00d37 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M meson.build M meson_options.txt 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/68/38668/1 diff --git a/meson.build b/meson.build index 07b89fc..2ff49d2 100644 --- a/meson.build +++ b/meson.build @@ -48,8 +48,8 @@ config_linux_spi = get_option('config_linux_spi') config_mstarddc_spi = get_option('config_mstarddc_spi') config_nic3com = get_option('config_nic3com') -config_nicintel_eeprom = get_option('config_nicintel_eeprom') config_nicintel = get_option('config_nicintel') +config_nicintel_eeprom = get_option('config_nicintel_eeprom') config_nicintel_spi = get_option('config_nicintel_spi') config_nicnatsemi = get_option('config_nicnatsemi') config_nicrealtek = get_option('config_nicrealtek') @@ -60,8 +60,8 @@ config_satamv = get_option('config_satamv') config_satasii = get_option('config_satasii') config_serprog = get_option('config_serprog') -config_usbblaster_spi = get_option('config_usbblaster_spi') config_stlinkv3_spi = get_option('config_stlinkv3_spi') +config_usbblaster_spi = get_option('config_usbblaster_spi') cargs = [] deps = [] diff --git a/meson_options.txt b/meson_options.txt index f81e605..8cef6e9 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -20,9 +20,9 @@ option('config_linux_spi', type : 'boolean', value : true, description : 'Linux spidev interfaces') option('config_mstarddc_spi', type : 'boolean', value : false, description : 'MSTAR DDC support') option('config_nic3com', type : 'boolean', value : true, description : '3Com NICs') +option('config_nicintel', type : 'boolean', value : true, description : 'Intel NICs') option('config_nicintel_eeprom', type : 'boolean', value : true, description : 'EEPROM on Intel NICs') option('config_nicintel_spi', type : 'boolean', value : true, description : 'SPI on Intel NICs') -option('config_nicintel', type : 'boolean', value : true, description : 'Intel NICs') option('config_nicnatsemi', type : 'boolean', value : false, description : 'National Semiconductor NICs') option('config_nicrealtek', type : 'boolean', value : true, description : 'Realtek NICs') option('config_ogp_spi', type : 'boolean', value : true, description : 'SPI on OGP cards') @@ -32,5 +32,5 @@ option('config_satamv', type : 'boolean', value : true, description : 'Marvell SATA controllers') option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA controllers') option('config_serprog', type : 'boolean', value : true, description : 'serprog') -option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') option('config_stlinkv3_spi', type : 'boolean', value : true, description : 'STMicroelectronics STLINK-V3') +option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') -- To view, visit https://review.coreboot.org/c/flashrom/+/38668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I77f97dc8ba0cfb2bec38342a80ace7b98ed00d37 Gerrit-Change-Number: 38668 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

4 6

Change in flashrom[master]: treewide: Use C-style comments on some files
by Angel Pons (Code Review) 03 Feb '20

03 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38660 ) Change subject: treewide: Use C-style comments on some files ...................................................................... treewide: Use C-style comments on some files On some files, most comments are C-style except for a few outliers. Change-Id: I74102108ef4b0365a9bf0fea20f012aece201892 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M 82802ab.c M flashrom.c M hwaccess.c M layout.c M os.h M physmap.c M platform.h M rayer_spi.c 8 files changed, 35 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/38660/1 diff --git a/82802ab.c b/82802ab.c index 281b66e..a44a66e 100644 --- a/82802ab.c +++ b/82802ab.c @@ -89,7 +89,7 @@ chipaddr bios = flash->virtual_memory; chip_writeb(flash, 0x70, bios); - if ((chip_readb(flash, bios) & 0x80) == 0) { // it's busy + if ((chip_readb(flash, bios) & 0x80) == 0) { /* it's busy */ while ((chip_readb(flash, bios) & 0x80) == 0) ; } @@ -107,15 +107,15 @@ chipaddr bios = flash->virtual_memory; uint8_t status; - // clear status register + /* clear status register */ chip_writeb(flash, 0x50, bios + page); - // now start it + /* now start it */ chip_writeb(flash, 0x20, bios + page); chip_writeb(flash, 0xd0, bios + page); programmer_delay(10); - // now let's see what the register is + /* now let's see what the register is */ status = wait_82802ab(flash); print_status_82802ab(status); @@ -164,7 +164,7 @@ /* Read block lock-bits */ for (i = 0; i < flash->chip->total_size * 1024; i+= (64 * 1024)) { - bcfg = chip_readb(flash, bios + i + 2); // read block lock config + bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */ msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); if (bcfg) { need_unlock = 1; diff --git a/flashrom.c b/flashrom.c index e540027..2bc1d54 100644 --- a/flashrom.c +++ b/flashrom.c @@ -452,7 +452,7 @@ #if CONFIG_NI845X_SPI == 1 { .name = "ni845x_spi", - .type = OTHER, // choose other because NI-845x uses own USB implementation + .type = OTHER, /* choose other because NI-845x uses own USB implementation */ .devs.note = "National Instruments USB-845x\n", .init = ni845x_spi_init, .map_flash_region = fallback_map, @@ -1324,7 +1324,7 @@ msg_gerr("Error: flushing file \"%s\" failed: %s\n", filename, strerror(errno)); ret = 1; } - // Try to fsync() only regular files and if that function is available at all (e.g. not on MinGW). + /* Try to fsync() only regular files and if that function is available at all (e.g. not on MinGW). */ #if defined(_POSIX_FSYNC) && (_POSIX_FSYNC != -1) struct stat image_stat; if (fstat(fileno(image), &image_stat) != 0) { @@ -1466,7 +1466,7 @@ "eraseblock layout is not defined. "); return 1; } - // TODO: Once erase functions are annotated with allowed buses, check that as well. + /* TODO: Once erase functions are annotated with allowed buses, check that as well. */ return 0; } diff --git a/hwaccess.c b/hwaccess.c index 48ccb34..0639d55 100644 --- a/hwaccess.c +++ b/hwaccess.c @@ -70,7 +70,7 @@ * * See also https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Docume… */ -#if IS_PPC // cf. http://lxr.free-electrons.com/source/arch/powerpc/include/asm/barrier.h +#if IS_PPC /* cf. http://lxr.free-electrons.com/source/arch/powerpc/include/asm/barrier.h */ asm("eieio" : : : "memory"); #elif IS_SPARC #if defined(__sparc_v9__) || defined(__sparcv9) diff --git a/layout.c b/layout.c index d80b01f..44ea667 100644 --- a/layout.c +++ b/layout.c @@ -68,7 +68,7 @@ if (2 != fscanf(romlayout, "%255s %255s\n", tempstr, tempname)) continue; #if 0 - // fscanf does not like arbitrary comments like that :( later + /* fscanf does not like arbitrary comments like that :( later */ if (tempstr[0] == '#') { continue; } diff --git a/os.h b/os.h index ddfa46b..1409d96 100644 --- a/os.h +++ b/os.h @@ -19,45 +19,45 @@ #include "platform.h" -// Solaris +/* Solaris */ #if defined (__sun) && (defined(__i386) || defined(__amd64)) #define __FLASHROM_OS__ "SunOS" -// OS X +/* OS X */ #elif defined(__MACH__) && defined(__APPLE__) #define __FLASHROM_OS__ "Darwin" -// FreeBSD +/* FreeBSD */ #elif defined(__FreeBSD__) #define __FLASHROM_OS__ "FreeBSD" -// FreeBSD with glibc-based userspace (e.g. Debian/kFreeBSD) +/* FreeBSD with glibc-based userspace (e.g. Debian/kFreeBSD) */ #elif defined(__FreeBSD_kernel__) && defined(__GLIBC__) #define __FLASHROM_OS__ "FreeBSD-glibc" -// DragonFlyBSD +/* DragonFlyBSD */ #elif defined(__DragonFly__) #define __FLASHROM_OS__ "DragonFlyBSD" -// NetBSD +/* NetBSD */ #elif defined(__NetBSD__) #define __FLASHROM_OS__ "NetBSD" -// OpenBSD +/* OpenBSD */ #elif defined(__OpenBSD__) #define __FLASHROM_OS__ "OpenBSD" -// DJGPP +/* DJGPP */ #elif defined(__DJGPP__) #define __FLASHROM_OS__ "DOS" -// MinGW (always has _WIN32 available) +/* MinGW (always has _WIN32 available) */ #elif defined(__MINGW32__) #define __FLASHROM_OS__ "MinGW" -// Cygwin (usually without _WIN32) +/* Cygwin (usually without _WIN32) */ #elif defined( __CYGWIN__) #define __FLASHROM_OS__ "Cygwin" -// libpayload +/* libpayload */ #elif defined(__LIBPAYLOAD__) #define __FLASHROM_OS__ "libpayload" -// GNU Hurd +/* GNU Hurd */ #elif defined(__gnu_hurd__) #define __FLASHROM_OS__ "Hurd" -// Linux +/* Linux */ #elif defined(__linux__) - // There are various flags in use on Android apparently. __ANDROID__ seems to be the most trustworthy. + /* There are various flags in use on Android apparently. __ANDROID__ seems to be the most trustworthy. */ #if defined(__ANDROID__) #define __FLASHROM_OS__ "Android" #else diff --git a/physmap.c b/physmap.c index 72d5899..a5cfc0d 100644 --- a/physmap.c +++ b/physmap.c @@ -397,7 +397,7 @@ } if (errno != EIO) { - // A severe error. + /* A severe error. */ msg_perr("Could not read() MSR: %s\n", strerror(errno)); close(fd_msr); exit(1); @@ -628,13 +628,13 @@ /* rdmsr() and wrmsr() are provided by DirectHW which needs neither setup nor cleanup. */ int setup_cpu_msr(int cpu) { - // Always succeed for now + /* Always succeed for now */ return 0; } void cleanup_cpu_msr(void) { - // Nothing, yet. + /* Nothing, yet. */ } #elif defined(__LIBPAYLOAD__) msr_t libpayload_rdmsr(int addr) @@ -682,10 +682,10 @@ void cleanup_cpu_msr(void) { - // Nothing, yet. + /* Nothing, yet. */ } -#endif // OS switches for MSR code -#else // x86 +#endif /* OS switches for MSR code */ +#else /* x86 */ /* Does MSR exist on non-x86 architectures? */ -#endif // arch switches for MSR code -#endif // CONFIG_INTERNAL == 1 +#endif /* arch switches for MSR code */ +#endif /* CONFIG_INTERNAL == 1 */ diff --git a/platform.h b/platform.h index 751957c..f3970be 100644 --- a/platform.h +++ b/platform.h @@ -20,7 +20,7 @@ #ifndef __PLATFORM_H__ #define __PLATFORM_H__ 1 -// Helper defines for operating systems +/* Helper defines for operating systems */ #if defined(__gnu_linux__) || defined(__linux__) #define IS_LINUX 1 #else @@ -37,7 +37,7 @@ #define IS_WINDOWS 0 #endif -// Likewise for target architectures +/* Likewise for target architectures */ #if defined (__i386__) || defined (__x86_64__) || defined(__amd64__) #define __FLASHROM_ARCH__ "x86" #define IS_X86 1 diff --git a/rayer_spi.c b/rayer_spi.c index 8e869e6..27169b6 100644 --- a/rayer_spi.c +++ b/rayer_spi.c @@ -151,7 +151,7 @@ { uint8_t tmp; - tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted + tmp = INB(lpt_iobase + 1) ^ 0x80; /* bit.7 inverted */ tmp = (tmp >> pinout->miso_bit) & 0x1; return tmp; } -- To view, visit https://review.coreboot.org/c/flashrom/+/38660 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I74102108ef4b0365a9bf0fea20f012aece201892 Gerrit-Change-Number: 38660 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

3 6

Change in flashrom[master]: meson.build: Align config options with tabs
by Angel Pons (Code Review) 03 Feb '20

03 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38667 ) Change subject: meson.build: Align config options with tabs ...................................................................... meson.build: Align config options with tabs Aligned text clearly shows that all options use the same format. Change-Id: Idf02cdb57b67d86eec4981b9bd000b197175ec67 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M meson.build 1 file changed, 32 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/67/38667/1 diff --git a/meson.build b/meson.build index 375089c..07b89fc 100644 --- a/meson.build +++ b/meson.build @@ -30,38 +30,38 @@ add_project_arguments('-DFLASHROM_VERSION="' + meson.project_version() + '"', language : 'c') # get defaults from configure -config_atahpt = get_option('config_atahpt') -config_atapromise = get_option('config_atapromise') -config_atavia = get_option('config_atavia') -config_buspirate_spi = get_option('config_buspirate_spi') -config_ch341a_spi = get_option('config_ch341a_spi') -config_dediprog = get_option('config_dediprog') -config_developerbox_spi = get_option('config_developerbox_spi') -config_digilent_spi = get_option('config_digilent_spi') -config_drkaiser = get_option('config_drkaiser') -config_dummy = get_option('config_dummy') -config_ft2232_spi = get_option('config_ft2232_spi') -config_gfxnvidia = get_option('config_gfxnvidia') -config_internal = get_option('config_internal') -config_it8212 = get_option('config_it8212') -config_linux_mtd = get_option('config_linux_mtd') -config_linux_spi = get_option('config_linux_spi') -config_mstarddc_spi = get_option('config_mstarddc_spi') -config_nic3com = get_option('config_nic3com') -config_nicintel_eeprom = get_option('config_nicintel_eeprom') -config_nicintel = get_option('config_nicintel') -config_nicintel_spi = get_option('config_nicintel_spi') -config_nicnatsemi = get_option('config_nicnatsemi') -config_nicrealtek = get_option('config_nicrealtek') -config_ogp_spi = get_option('config_ogp_spi') -config_pickit2_spi = get_option('config_pickit2_spi') -config_pony_spi = get_option('config_pony_spi') -config_rayer_spi = get_option('config_rayer_spi') -config_satamv = get_option('config_satamv') -config_satasii = get_option('config_satasii') -config_serprog = get_option('config_serprog') -config_usbblaster_spi = get_option('config_usbblaster_spi') -config_stlinkv3_spi = get_option('config_stlinkv3_spi') +config_atahpt = get_option('config_atahpt') +config_atapromise = get_option('config_atapromise') +config_atavia = get_option('config_atavia') +config_buspirate_spi = get_option('config_buspirate_spi') +config_ch341a_spi = get_option('config_ch341a_spi') +config_dediprog = get_option('config_dediprog') +config_developerbox_spi = get_option('config_developerbox_spi') +config_digilent_spi = get_option('config_digilent_spi') +config_drkaiser = get_option('config_drkaiser') +config_dummy = get_option('config_dummy') +config_ft2232_spi = get_option('config_ft2232_spi') +config_gfxnvidia = get_option('config_gfxnvidia') +config_internal = get_option('config_internal') +config_it8212 = get_option('config_it8212') +config_linux_mtd = get_option('config_linux_mtd') +config_linux_spi = get_option('config_linux_spi') +config_mstarddc_spi = get_option('config_mstarddc_spi') +config_nic3com = get_option('config_nic3com') +config_nicintel_eeprom = get_option('config_nicintel_eeprom') +config_nicintel = get_option('config_nicintel') +config_nicintel_spi = get_option('config_nicintel_spi') +config_nicnatsemi = get_option('config_nicnatsemi') +config_nicrealtek = get_option('config_nicrealtek') +config_ogp_spi = get_option('config_ogp_spi') +config_pickit2_spi = get_option('config_pickit2_spi') +config_pony_spi = get_option('config_pony_spi') +config_rayer_spi = get_option('config_rayer_spi') +config_satamv = get_option('config_satamv') +config_satasii = get_option('config_satasii') +config_serprog = get_option('config_serprog') +config_usbblaster_spi = get_option('config_usbblaster_spi') +config_stlinkv3_spi = get_option('config_stlinkv3_spi') cargs = [] deps = [] -- To view, visit https://review.coreboot.org/c/flashrom/+/38667 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idf02cdb57b67d86eec4981b9bd000b197175ec67 Gerrit-Change-Number: 38667 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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flashrom-gerrit February 2020