February 2020 - flashrom-gerrit

Change in flashrom[master]: Add -- to make clean
by Ryan O'Leary (Code Review) 01 Aug '24

01 Aug '24

Ryan O'Leary has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37776 ) Change subject: Add -- to make clean ...................................................................... Add -- to make clean Somehow, I ended up with a file name "-c.d". I probably made it by mistake. This change lets "make clean" be a bit more resilient to files such as these. Change-Id: I2517ffac975f3df75f706350a07f189a98a11b7c Signed-off-by: Ryan O'Leary <ryanoleary(a)google.com> --- M Makefile 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/37776/1 diff --git a/Makefile b/Makefile index 518d41b..fa66910 100644 --- a/Makefile +++ b/Makefile @@ -1129,7 +1129,7 @@ # This includes all frontends and libflashrom. # We don't use EXEC_SUFFIX here because we want to clean everything. clean: - rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) + rm -f -- $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) @+$(MAKE) -C util/ich_descriptors_tool/ clean distclean: clean -- To view, visit https://review.coreboot.org/c/flashrom/+/37776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2517ffac975f3df75f706350a07f189a98a11b7c Gerrit-Change-Number: 37776 Gerrit-PatchSet: 1 Gerrit-Owner: Ryan O'Leary <ryanoleary(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: dediprog: Fix SF600 4BA mode
by Patrick Rudolph (Code Review) 25 Nov '23

25 Nov '23

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/34629 to review the following change. Change subject: dediprog: Fix SF600 4BA mode ...................................................................... dediprog: Fix SF600 4BA mode Flash chips greater than 16MiB require 4BA mode support. Current master doesn't support such mode as the SF600 uses PROTOCOL_V3. Fix protocol version check to support 4BA on PROTOCOL_V3, too. Tested on SF600 V:7.2.45 Able to read and write "IS25WP256" (32768 kB, SPI). Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M dediprog.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/34629/1 diff --git a/dediprog.c b/dediprog.c index 3566109..add478d 100644 --- a/dediprog.c +++ b/dediprog.c @@ -1160,7 +1160,7 @@ if (dediprog_devicetype == DEV_SF100 && protocol() == PROTOCOL_V1) spi_master_dediprog.features &= ~SPI_MASTER_NO_4BA_MODES; - if (protocol() == PROTOCOL_V2) + if (protocol() >= PROTOCOL_V2) spi_master_dediprog.features |= SPI_MASTER_4BA; if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE)) -- To view, visit https://review.coreboot.org/c/flashrom/+/34629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707 Gerrit-Change-Number: 34629 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

4 7

Change in ...flashrom[master]: cli_classic: Report the gathered layout entries at level dbg
by Nico Huber (Code Review) 04 Nov '22

04 Nov '22

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31012 Change subject: cli_classic: Report the gathered layout entries at level dbg ...................................................................... cli_classic: Report the gathered layout entries at level dbg Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M cli_classic.c M layout.c M layout.h 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/31012/1 diff --git a/cli_classic.c b/cli_classic.c index ced08c6..536ef24 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -645,6 +645,8 @@ goto out_shutdown; } + report_layout(layout); + flashrom_layout_set(fill_flash, layout); flashrom_flag_set(fill_flash, FLASHROM_FLAG_FORCE, !!force); #if CONFIG_INTERNAL == 1 diff --git a/layout.c b/layout.c index fa66238..c589d17 100644 --- a/layout.c +++ b/layout.c @@ -229,3 +229,17 @@ return ret; } + +void report_layout(const struct flashrom_layout *const l) +{ + unsigned int i; + + if (!l) + return; + + msg_gdbg("Gathered %zu layout entries:\n", l->num_entries); + for (i = 0; i < l->num_entries; ++i) { + msg_gdbg("%08"PRIx32":%08"PRIx32" %s\n", + l->entries[i].start, l->entries[i].end, l->entries[i].name); + } +} diff --git a/layout.h b/layout.h index eb54a4f..61311bc 100644 --- a/layout.h +++ b/layout.h @@ -59,4 +59,6 @@ int process_include_args(struct flashrom_layout *); +void report_layout(const struct flashrom_layout *); + #endif /* !__LAYOUT_H__ */ -- To view, visit https://review.coreboot.org/c/flashrom/+/31012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Gerrit-Change-Number: 31012 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: chipset_enable.c: Add Icelake U to known systems
by Mimoja (Code Review) 13 Apr '22

13 Apr '22

Mimoja has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37987 ) Change subject: chipset_enable.c: Add Icelake U to known systems ...................................................................... chipset_enable.c: Add Icelake U to known systems Intel Icelake Systems use an (so far) underdescribed 495 Series Chipset that behaves compaitble to pch300 chips. Change-Id: I6227d32f4476420cf1aeec37ebd4b7648e0b3d15 Signed-off-by: Johanna Schander <git(a)mimoja.de> --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/87/37987/1 diff --git a/chipset_enable.c b/chipset_enable.c index e826d90..988720b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2046,6 +2046,7 @@ {0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300}, {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, + {0x8086, 0x3482, B_S, DEP, "Intel", "Icelake U Premium", enable_flash_pch300}, #endif {0}, }; -- To view, visit https://review.coreboot.org/c/flashrom/+/37987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6227d32f4476420cf1aeec37ebd4b7648e0b3d15 Gerrit-Change-Number: 37987 Gerrit-PatchSet: 1 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: hwaccess: Add endianness converting deserialization functions
by Nico Huber (Code Review) 13 Apr '22

13 Apr '22

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31016 Change subject: hwaccess: Add endianness converting deserialization functions ...................................................................... hwaccess: Add endianness converting deserialization functions Add functions like uint32_t read_le32(const void *); Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M hwaccess.h 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/16/31016/1 diff --git a/hwaccess.h b/hwaccess.h index af7054b..5df4fc3 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -20,6 +20,7 @@ #ifndef __HWACCESS_H__ #define __HWACCESS_H__ 1 +#include <stdint.h> #include "platform.h" #if NEED_PCI == 1 @@ -109,6 +110,19 @@ #define le_to_cpu32 cpu_to_le32 #define le_to_cpu64 cpu_to_le64 +#define read_from(endianness, bits) \ +static inline uint##bits##_t read_##endianness##bits(const void *from) \ +{ \ + return le_to_cpu##bits(*(uint##bits##_t *)from); \ +} + +read_from(be, 8) +read_from(be, 16) +read_from(be, 32) +read_from(le, 8) +read_from(le, 16) +read_from(le, 32) + #if NEED_RAW_ACCESS == 1 #if IS_X86 -- To view, visit https://review.coreboot.org/c/flashrom/+/31016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Gerrit-Change-Number: 31016 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

6 32

Change in flashrom[master]: chipset_enable.c: Enable Tiger Lake U support
by Edward O'Callaghan (Code Review) 11 Apr '22

11 Apr '22

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37777 ) Change subject: chipset_enable.c: Enable Tiger Lake U support ...................................................................... chipset_enable.c: Enable Tiger Lake U support Did a basic local test with --flash-name and -r bios and ran strings to see if the bios contained reasonable data. BUG=b:146089922 Change-Id: I2c13e0173c9b5e17d2ae197f4a4ab9aa2825c1b3 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37777/1 diff --git a/chipset_enable.c b/chipset_enable.c index b55852c..d5a2f03 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1996,6 +1996,7 @@ {0x8086, 0x9d56, B_S, NT, "Intel", "Kaby Lake Y Premium", enable_flash_pch100}, {0x8086, 0x9d58, B_S, NT, "Intel", "Kaby Lake U Premium", enable_flash_pch100}, {0x8086, 0x9d84, B_S, DEP, "Intel", "Cannon Lake U Premium", enable_flash_pch300}, + {0x8086, 0xa082, B_FS, NT, "Intel", "Tiger Lake U", enable_flash_pch300}, {0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100}, {0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100}, {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100}, -- To view, visit https://review.coreboot.org/c/flashrom/+/37777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2c13e0173c9b5e17d2ae197f4a4ab9aa2825c1b3 Gerrit-Change-Number: 37777 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

5 8

Change in flashrom[master]: usbdev: fix accepting shorter serial numbers than the real one.
by Miklós Márton (Code Review) 16 Mar '22

16 Mar '22

Miklós Márton has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34641 ) Change subject: usbdev: fix accepting shorter serial numbers than the real one. ...................................................................... usbdev: fix accepting shorter serial numbers than the real one. Change-Id: Ife8c4e0a957c4345e27ec9ae9e1480ca80fe505c --- M usbdev.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/41/34641/1 diff --git a/usbdev.c b/usbdev.c index 764ac04..7e41235 100644 --- a/usbdev.c +++ b/usbdev.c @@ -104,7 +104,8 @@ msg_pdbg("Serial number is %s\n", myserial); /* Filter out any serial number that does not commence with serialno */ - return 0 != strncmp(serialno, (char *)myserial, strlen(serialno)); + return strlen((char *)myserial) == strlen(serialno) + && 0 != strncmp(serialno, (char *)myserial, strlen(serialno)); } struct libusb_device_handle *usb_dev_get_by_vid_pid_serial( -- To view, visit https://review.coreboot.org/c/flashrom/+/34641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ife8c4e0a957c4345e27ec9ae9e1480ca80fe505c Gerrit-Change-Number: 34641 Gerrit-PatchSet: 1 Gerrit-Owner: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

2 5

Change in flashrom[master]: flashchips: Add W25Q64.V.M
by Keith Hui (Code Review) 26 Dec '21

26 Dec '21

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38578 ) Change subject: flashchips: Add W25Q64.V.M ...................................................................... flashchips: Add W25Q64.V.M Add Winbond W25Q64JV?M SPI flash chip. Some tests were done on a W25Q64JVSSIM mounted on a Sparkfun SOIC-DIP adapter, connected to an Arduino Mega 2560 r3 loaded with frser-duino. Probe and read works, but instability were observed in the connection between Arduino and the chip, so this is being submitted as untested. Datasheet: https://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf Change-Id: Ib7749835178ee6a1b0fe579e7a0c29e69a67933b Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/38578/1 diff --git a/flashchips.c b/flashchips.c index 65dda0e..bfa2927 100644 --- a/flashchips.c +++ b/flashchips.c @@ -16936,6 +16936,46 @@ { .vendor = "Winbond", + .name = "W25Q64.V.M", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q64_V_M, + .total_size = 8192, + .page_size = 256, + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", .name = "W25Q64.W", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, diff --git a/flashchips.h b/flashchips.h index 14ab6de..bdfadad 100644 --- a/flashchips.h +++ b/flashchips.h @@ -938,6 +938,7 @@ #define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */ #define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */ #define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */ +#define WINBOND_NEX_W25Q64_V_M 0x7017 /* W25Q64JVSIM */ #define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ #define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */ -- To view, visit https://review.coreboot.org/c/flashrom/+/38578 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7749835178ee6a1b0fe579e7a0c29e69a67933b Gerrit-Change-Number: 38578 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: freebsd_spi: Use malloc() instead of alloca()
by David Hendricks (Code Review) 10 Oct '21

10 Oct '21

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/30765 Change subject: freebsd_spi: Use malloc() instead of alloca() ...................................................................... freebsd_spi: Use malloc() instead of alloca() Change-Id: I03ff2bd1e20bea014333945771b560f17387ebd6 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M freebsd_spi.c 1 file changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/30765/1 diff --git a/freebsd_spi.c b/freebsd_spi.c index 215be20..7514912 100644 --- a/freebsd_spi.c +++ b/freebsd_spi.c @@ -145,7 +145,11 @@ /* FreeBSD uses a single buffer for rx and tx. Allocate a temporary one to avoid overwriting anything. */ size_t tmpcnt = readcnt + writecnt; - unsigned char *tmpbuf = alloca(tmpcnt); + unsigned char *tmpbuf = malloc(tmpcnt); + if (!tmpbuf) { + msg_perr("Out of memory!\n"); + return -1; + } bzero(tmpbuf, tmpcnt); memcpy(tmpbuf, txbuf, writecnt); @@ -164,12 +168,14 @@ if (ioctl(fd, SPIGENIOC_TRANSFER, &msg) == -1) { msg_cerr("%s: ioctl: %s\n", __func__, strerror(errno)); + free(tmpbuf); return -1; } if (rxbuf) memcpy(rxbuf, tmpbuf + writecnt, readcnt); + free(tmpbuf); return 0; } -- To view, visit https://review.coreboot.org/c/flashrom/+/30765 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I03ff2bd1e20bea014333945771b560f17387ebd6 Gerrit-Change-Number: 30765 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

1 1

Change in ...flashrom[master]: Add freebsd_spi programmer
by David Hendricks (Code Review) 10 Oct '21

10 Oct '21

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/30764 Change subject: Add freebsd_spi programmer ...................................................................... Add freebsd_spi programmer Based on linux_spi, using FreeBSD's spigen(4) interface. Change-Id: I4e1689416fbb309df94807f51635bc1f4b53e0c8 Signed-off-by: Greg V <greg(a)unrelenting.technology> --- M Makefile M flashrom.8.tmpl M flashrom.c A freebsd_spi.c M programmer.h 5 files changed, 246 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/64/30764/1 diff --git a/Makefile b/Makefile index 1ff578c..7e709dc 100644 --- a/Makefile +++ b/Makefile @@ -379,6 +379,14 @@ endif endif +ifneq ($(TARGET_OS), FreeBSD) +ifeq ($(CONFIG_FREEBSD_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_FREEBSD_SPI=yes +else +override CONFIG_FREEBSD_SPI = no +endif +endif + ############################################################################### # General architecture-specific settings. # Like above for the OS, below we verify user-supplied options depending on the target architecture. @@ -647,6 +655,9 @@ CONFIG_LINUX_MTD ?= yes CONFIG_LINUX_SPI ?= yes +# Enable FreeBSD spigen interface by default. We disable them on non-FreeBSD targets. +CONFIG_FREEBSD_SPI ?= yes + # Always enable ITE IT8212F PATA controllers for now. CONFIG_IT8212 ?= yes @@ -945,6 +956,11 @@ PROGRAMMER_OBJS += linux_spi.o endif +ifeq ($(CONFIG_FREEBSD_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_FREEBSD_SPI=1' +PROGRAMMER_OBJS += freebsd_spi.o +endif + ifeq ($(CONFIG_MSTARDDC_SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(call debug_shell,grep -q "LINUX_I2C_SUPPORT := yes" .features && printf "%s" "-D'CONFIG_MSTARDDC_SPI=1'") diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index c557af7..092f070 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -319,6 +319,8 @@ .sp .BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)" .sp +.BR "* freebsd_spi" " (for SPI flash ROMs accessible via /dev/spigenX.Y on FreeBSD)" +.sp .BR "* usbblaster_spi" " (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)" .sp .BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)" @@ -1065,6 +1067,25 @@ .sp Please note that the linux_spi driver only works on Linux. .SS +.BR "freebsd_spi " programmer +.IP +You have to specify the SPI controller to use with the +.sp +.B " flashrom \-p freebsd_spi:dev=/dev/spigenX.Y" +.sp +syntax where +.B /dev/spigenX.Y +is the FreeBSD device node for your SPI controller. +.sp +In case the device supports it, you can set the SPI clock frequency with the optional +.B spispeed +parameter. The frequency is parsed as kilohertz. +Example that sets the frequency to 8 MHz: +.sp +.B " flashrom \-p freebsd_spi:dev=/dev/spigenX.Y,spispeed=8000" +.sp +Please note that the freebsd_spi driver only works on FreeBSD. +.SS .BR "mstarddc_spi " programmer .IP The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging diff --git a/flashrom.c b/flashrom.c index 59a7531..624bcfb 100644 --- a/flashrom.c +++ b/flashrom.c @@ -377,6 +377,18 @@ }, #endif +#if CONFIG_FREEBSD_SPI == 1 + { + .name = "freebsd_spi", + .type = OTHER, + .devs.note = "Device files /dev/spigen*.*\n", + .init = freebsd_spi_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_USBBLASTER_SPI == 1 { .name = "usbblaster_spi", diff --git a/freebsd_spi.c b/freebsd_spi.c new file mode 100644 index 0000000..215be20 --- /dev/null +++ b/freebsd_spi.c @@ -0,0 +1,186 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * Copyright (C) 2018 Greg V <greg(a)unrelenting.technology> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#if CONFIG_FREEBSD_SPI == 1 + +#include <stdio.h> +#include <string.h> +#include <stdlib.h> +#include <fcntl.h> +#include <errno.h> +#include <ctype.h> +#include <unistd.h> +#include <sys/ioctl.h> +#include <sys/types.h> +#include <sys/ioccom.h> +#include <sys/spigenio.h> +#include "flash.h" +#include "chipdrivers.h" +#include "programmer.h" +#include "spi.h" + +/* Tested on: + * Xunlong Orange Pi PC (Allwinner H3) */ + +/* Same as in spi(8) */ +#define DEFAULT_BUFFER_SIZE 8192 + +static int fd = -1; + +static int freebsd_spi_shutdown(void *data); +static int freebsd_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *txbuf, + unsigned char *rxbuf); +static int freebsd_spi_read(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len); +static int freebsd_spi_write_256(struct flashctx *flash, const uint8_t *buf, + unsigned int start, unsigned int len); + +static const struct spi_master spi_master_freebsd = { + .type = SPI_CONTROLLER_FREEBSD, + .features = SPI_MASTER_4BA, + .max_data_read = MAX_DATA_UNSPECIFIED, /* TODO? */ + .max_data_write = MAX_DATA_UNSPECIFIED, /* TODO? */ + .command = freebsd_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = freebsd_spi_read, + .write_256 = freebsd_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +int freebsd_spi_init(void) +{ + char *p, *endp, *dev; + uint32_t speed_hz = 0; + /* FIXME: make the following configurable by CLI options. */ + /* SPI mode 0 (beware this also includes: MSB first, CS active low and others */ + const uint8_t mode = 0; + + p = extract_programmer_param("spispeed"); + if (p && strlen(p)) { + speed_hz = (uint32_t)strtoul(p, &endp, 10) * 1000; + if (p == endp) { + msg_perr("%s: invalid clock: %s kHz\n", __func__, p); + free(p); + return 1; + } + } + free(p); + + dev = extract_programmer_param("dev"); + if (!dev || !strlen(dev)) { + msg_perr("No SPI device given. Use flashrom -p " + "freebsd_spi:dev=/dev/spigenX.Y\n"); + free(dev); + return 1; + } + + msg_pdbg("Using device %s\n", dev); + if ((fd = open(dev, O_RDWR)) == -1) { + msg_perr("%s: failed to open %s: %s\n", __func__, + dev, strerror(errno)); + free(dev); + return 1; + } + free(dev); + + if (register_shutdown(freebsd_spi_shutdown, NULL)) + return 1; + /* We rely on the shutdown function for cleanup from here on. */ + + if (speed_hz > 0) { + if (ioctl(fd, SPIGENIOC_SET_CLOCK_SPEED, &speed_hz) == -1) { + msg_perr("%s: failed to set speed to %d Hz: %s\n", + __func__, speed_hz, strerror(errno)); + return 1; + } + + msg_pdbg("Using %d kHz clock\n", speed_hz/1000); + } + + if (ioctl(fd, SPIGENIOC_SET_SPI_MODE, &mode) == -1) { + msg_perr("%s: failed to set SPI mode to 0x%02x: %s\n", + __func__, mode, strerror(errno)); + return 1; + } + + register_spi_master(&spi_master_freebsd); + return 0; +} + +static int freebsd_spi_shutdown(void *data) +{ + if (fd != -1) { + close(fd); + fd = -1; + } + return 0; +} + +static int freebsd_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *txbuf, + unsigned char *rxbuf) +{ + if (fd == -1) + return -1; + /* The implementation currently does not support requests that + don't start with sending a command. */ + if (writecnt == 0) + return SPI_INVALID_LENGTH; + + /* FreeBSD uses a single buffer for rx and tx. Allocate a temporary one to avoid overwriting anything. */ + size_t tmpcnt = readcnt + writecnt; + unsigned char *tmpbuf = alloca(tmpcnt); + + bzero(tmpbuf, tmpcnt); + memcpy(tmpbuf, txbuf, writecnt); + + /* Command/data separation is pretty useless, spi(8) only uses the command. */ + struct spigen_transfer msg = { + .st_command = { + .iov_base = (void*)tmpbuf, + .iov_len = tmpcnt, + }, + .st_data = { + .iov_base = NULL, + .iov_len = 0, + }, + }; + + if (ioctl(fd, SPIGENIOC_TRANSFER, &msg) == -1) { + msg_cerr("%s: ioctl: %s\n", __func__, strerror(errno)); + return -1; + } + + if (rxbuf) + memcpy(rxbuf, tmpbuf + writecnt, readcnt); + + return 0; +} + +static int freebsd_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +{ + return spi_read_chunked(flash, buf, start, len, DEFAULT_BUFFER_SIZE); +} + +static int freebsd_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) +{ + return spi_write_chunked(flash, buf, start, len, DEFAULT_BUFFER_SIZE); +} + +#endif // CONFIG_FREEBSD_SPI == 1 diff --git a/programmer.h b/programmer.h index 311992a..30687ed 100644 --- a/programmer.h +++ b/programmer.h @@ -103,6 +103,9 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +#if CONFIG_FREEBSD_SPI == 1 + PROGRAMMER_FREEBSD_SPI, +#endif #if CONFIG_USBBLASTER_SPI == 1 PROGRAMMER_USBBLASTER_SPI, #endif @@ -548,6 +551,11 @@ int linux_spi_init(void); #endif +/* freebsd_spi.c */ +#if CONFIG_FREEBSD_SPI == 1 +int freebsd_spi_init(void); +#endif + /* dediprog.c */ #if CONFIG_DEDIPROG == 1 int dediprog_init(void); @@ -623,6 +631,9 @@ #if CONFIG_LINUX_SPI == 1 SPI_CONTROLLER_LINUX, #endif +#if CONFIG_FREEBSD_SPI == 1 + SPI_CONTROLLER_FREEBSD, +#endif #if CONFIG_SERPROG == 1 SPI_CONTROLLER_SERPROG, #endif -- To view, visit https://review.coreboot.org/c/flashrom/+/30764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4e1689416fbb309df94807f51635bc1f4b53e0c8 Gerrit-Change-Number: 30764 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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flashrom-gerrit February 2020