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Change subject: erasure_layout: Fix unaligned region end offset by 1
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Patch Set 3:
(1 comment)
Patchset:
PS3:
Carly, Vincent,
Happy New Year!
I left this patch for the holidays, but now I am gradually returning back.
I thought to add you to this patch because you might be interested to have a look (or maybe test), I remember you are using this functionality a lot.
I tested on some images (added comments in the ticket) and also wrote tests in the following patch CB:78985
Thank you so much for your help!
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79633?usp=email )
Change subject: flashchips: Remove Macronix MX25U25635F from chip list
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Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/79633/comment/e3440f1b_798cb553 :
PS1, Line 7: Remove Macronix MX25U25635F from chip list
If the patch goes through (see my other comment), then commit title need to mention both chips, for example:
> Update definitions for MX25U25635F and MX25U25643G
Patchset:
PS1:
Daniel, thank you for the patch! Sorry there was some delay in review, we had holidays here. Happy New Year!
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/79633/comment/7ad9014e_951f3633 :
PS1, Line 10310: .wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */
I looked through both datasheets, and found there is unfortunately this one difference!
For MX25U25643G: Table 12. Security Register Definitions
has bit7 set by WPSEL command (as it is in the existing definition)
For MX25U25635F: Table 8. Security Register Definitions
has bit7 marked as reserved
So this one `.wps` definition in `.reg_bits` only applies to newer model it seems.
In general, this was the only difference between two chip definitions, the older one had no support for write-protect operation defined, the newer one has it defined as marked as tested.
Let's also check with Nikolai, but in general, if there is any difference between two chip definitions, we will need to leave both of them (people might still have old chips used).
Your other idea about renaming model id macro is valid though, maybe it can be done even if both definitions stay.
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Hello Anastasia Klimchuk, David Wu, Hsuan-ting Chen, Kapil Porwal, Lean Sheng Tan, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/79460?usp=email
to look at the new patch set (#11).
The following approvals got outdated and were removed:
Code-Review+2 by Hsuan-ting Chen, Code-Review+2 by Nikolai Artemiev, Verified+1 by build bot (Jenkins)
The change is no longer submittable: Code-Review and Verified are unsatisfied now.
Change subject: flashchips: Add write-protect support for GD25LQ255E
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flashchips: Add write-protect support for GD25LQ255E
datasheet: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-0…
BUG=b:311336475
TEST=Verified on karis
w/o this patch:
$ flashrom_tester --flashrom_binary ./flashrom internal Lock_top_quad
--> Failed
w/ this patch:
$ flashrom_tester --flashrom_binary ./flashrom internal Lock_top_quad
--> Pass
This lock_top_quad test did(copied from partial_lock_test()):
* Disable hardware WP so we can modify the protected range.
* Then enable software WP so the range is enforced and enable
hardware WP so that flashrom does not disable software WP during the
operation.
* Check that we cannot write to the protected region.
* Check that we can write to the non protected region.
Change-Id: I1425e931433c00caceaabc6037a79099d6d5eac5
Signed-off-by: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com>
---
M flashchips.c
1 file changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/79460/11
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