October 2019 - flashrom-gerrit

Change in flashrom[master]: flashchips.c: Add GD25Q256D from downstream
by Alan Green (Code Review) Oct. 4, 2019

Oct. 4, 2019

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/35480 ) Change subject: flashchips.c: Add GD25Q256D from downstream ...................................................................... flashchips.c: Add GD25Q256D from downstream Take definition of GD25Q256D from ChromiumOS repository. This chip was added in `commit 0c38355c` by dlaurie(a)google.com 2019-03-17. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: I79d4ed48aa9126a8a6ce455a9564451346195b8f --- M flashchips.c M flashchips.h 2 files changed, 38 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/35480/1 diff --git a/flashchips.c b/flashchips.c index ac07fa8..1d9d9e7 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6274,6 +6274,43 @@ { .vendor = "GigaDevice", + .name = "GD25Q256D", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q256D, + .total_size = 32768, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", .name = "GD25Q32(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, diff --git a/flashchips.h b/flashchips.h index 7b8bf04..c4b863d 100644 --- a/flashchips.h +++ b/flashchips.h @@ -372,6 +372,7 @@ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ +#define GIGADEVICE_GD25Q256D 0x4019 #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 -- To view, visit https://review.coreboot.org/c/flashrom/+/35480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I79d4ed48aa9126a8a6ce455a9564451346195b8f Gerrit-Change-Number: 35480 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: Add support for National Instruments USB-845x devices
by Miklós Márton (Code Review) Oct. 4, 2019

Oct. 4, 2019

Miklós Márton has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/25683 ) Change subject: Add support for National Instruments USB-845x devices ...................................................................... Patch Set 25: > Patch Set 25: Code-Review+2 > > (4 comments) > > I'm willing to merge this as is. The automatic voltage adaption > seems a little rough on the edges, though. Generally, such a > feature would belong into a higher level of flashrom. And then > there is the possibility that the user didn't connect the chip > directly to the programmer... > > Anyway, this already adds a lot to flashrom's traits. I'll try > to rebase it in Gerrit. If that works and there are no further > comments, I'll try to merge it this weekend. Good timing, I will fix the outstanding issues today/tomorrow. I agree with the adding option for the IO voltage override. -- To view, visit https://review.coreboot.org/c/flashrom/+/25683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Gerrit-Change-Number: 25683 Gerrit-PatchSet: 25 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-CC: Stefan T <stefan.tauner(a)gmx.at> Gerrit-Comment-Date: Fri, 04 Oct 2019 13:32:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: Add support for National Instruments USB-845x devices
by Nico Huber (Code Review) Oct. 4, 2019

Oct. 4, 2019

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/25683 ) Change subject: Add support for National Instruments USB-845x devices ...................................................................... Patch Set 25: Code-Review+2 (4 comments) I'm willing to merge this as is. The automatic voltage adaption seems a little rough on the edges, though. Generally, such a feature would belong into a higher level of flashrom. And then there is the possibility that the user didn't connect the chip directly to the programmer... Anyway, this already adds a lot to flashrom's traits. I'll try to rebase it in Gerrit. If that works and there are no further comments, I'll try to merge it this weekend. https://review.coreboot.org/c/flashrom/+/25683/25/ni845x_spi.c File ni845x_spi.c: https://review.coreboot.org/c/flashrom/+/25683/25/ni845x_spi.c@253 PS25, Line 253: if (io_voltage_100mV < usb8452_io_voltages_in_100mV[0]) { Nit, if called with `use_smaller = false` we might not want to take this path? Currently, that is not possible with the chips in our database anyway. https://review.coreboot.org/c/flashrom/+/25683/25/ni845x_spi.c@443 PS25, Line 443: if (device_pid == USB8451) { Nit, taking this path will result in no warning printed, even if the user specified a `voltage`, AFAICS? usb8452_spi_set_io_voltage() should show the warning and return 0, so I guess we just don't need this `if` around it. https://review.coreboot.org/c/flashrom/+/25683/25/ni845x_spi.c@504 PS25, Line 504: return -1; This path is a little troubling. What if the user has a voltage translator hooked-up? They wouldn't have a way to force operation... https://review.coreboot.org/c/flashrom/+/25683/25/ni845x_spi.c@542 PS25, Line 542: } Might look nicer with the whole `if` block in a separate fucntion. -- To view, visit https://review.coreboot.org/c/flashrom/+/25683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Gerrit-Change-Number: 25683 Gerrit-PatchSet: 25 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Márton Miklós <martonmiklosqdev(a)gmail.com> Gerrit-CC: Stefan T <stefan.tauner(a)gmx.at> Gerrit-Comment-Date: Fri, 04 Oct 2019 12:45:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: Add board enable for Asus P4P800SE
by Miklós Márton (Code Review) Oct. 4, 2019

Oct. 4, 2019

Miklós Márton has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34764 ) Change subject: Add board enable for Asus P4P800SE ...................................................................... Add board enable for Asus P4P800SE See github issue #32: https://github.com/flashrom/flashrom/issues/32 Change-Id: I12b25ca3f85e5f2302681bddbe1adafa49c5fcb9 Signed-off-by: Miklós Márton <martonmiklosqdev(a)gmail.com> --- M board_enable.c M print.c 2 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/64/34764/1 diff --git a/board_enable.c b/board_enable.c index 74612f5..5872a9a 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1708,6 +1708,7 @@ * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R * - ASUS P4P800-VM: Intel socket478 + 865PE + ICH5R * - ASUS P4P800-X: Intel socket478 + 865PE + ICH5R + * - ASUS P4P800SE: Intel socket478 + 865PE + ICH5R * - ASUS P5GD1 Pro: Intel LGA 775 + 915P + ICH6R * - ASUS P5GD2 Premium: Intel LGA775 + 915G + ICH6R * - ASUS P5GDC Deluxe: Intel socket775 + 915P + ICH6R @@ -2362,6 +2363,7 @@ {0x8086, 0x2570, 0x1043, 0x80f2, 0x8086, 0x24d3, 0x1043, 0x80a6, "^P4P800-E$", NULL, NULL, P3, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80a5, 0x8086, 0x24d3, 0x1043, 0x80a6, "^P4P800-VM$", NULL, NULL, P3, "ASUS", "P4P800-VM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80f2, 0x8086, 0x24d3, 0x1043, 0x80a6, "^P4P800-X$", NULL, NULL, P3, "ASUS", "P4P800-X", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80f2, 0x8086, 0x24d3, 0, 0, "^P4P800SE$", NULL, NULL, P3, "ASUS", "P4P800SE", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80b2, 0x8086, 0x24c3, 0x1043, 0x8089, "^P4PE-X/TE$",NULL, NULL, P3, "ASUS", "P4PE-X/TE", 0, NT, intel_ich_gpio21_raise}, {0x1039, 0x0651, 0x1043, 0x8081, 0x1039, 0x0962, 0, 0, NULL, NULL, NULL, P3, "ASUS", "P4SC-E", 0, OK, it8707f_write_enable_2e}, {0x8086, 0x2570, 0x1043, 0x80A5, 0x105A, 0x24D3, 0x1043, 0x80A6, NULL, NULL, NULL, P3, "ASUS", "P4SD-LA", 0, NT, intel_ich_gpio32_raise}, diff --git a/print.c b/print.c index 2901c50..67cb89a 100644 --- a/print.c +++ b/print.c @@ -676,6 +676,7 @@ B("ASUS", "P4P800-E Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL), B("ASUS", "P4P800-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL), B("ASUS", "P4P800-X", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800X/", NULL), + B("ASUS", "P4P800SE", OK, "https://www.asus.com/supportonly/P4P800 SE/", NULL), B("ASUS", "P4PE-X/TE", NT, "https://www.asus.com/999/html/events/mb/socket478/p4pe-x-te/overview.htm", NULL), B("ASUS", "P4S533-X", OK, NULL, NULL), B("ASUS", "P4S800-MX", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL), -- To view, visit https://review.coreboot.org/c/flashrom/+/34764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I12b25ca3f85e5f2302681bddbe1adafa49c5fcb9 Gerrit-Change-Number: 34764 Gerrit-PatchSet: 1 Gerrit-Owner: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: Removed strndup because it is not available in MingW
by Miklós Márton (Code Review) Oct. 4, 2019

Oct. 4, 2019

Miklós Márton has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34621 ) Change subject: Removed strndup because it is not available in MingW ...................................................................... Removed strndup because it is not available in MingW Signed-off-by: Miklós Márton <martonmiklosqdev(a)gmail.com> Change-Id: If418080bffff1f5961cacf2a300ea9c666682458 --- M libflashrom.c 1 file changed, 10 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/34621/1 diff --git a/libflashrom.c b/libflashrom.c index af62002..a1c0a9c 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -371,6 +371,7 @@ struct flashctx *const flashctx, const struct fmap *const fmap) { int i; + size_t len; struct flashrom_layout *l = get_global_layout(); if (!fmap || !l) @@ -385,8 +386,15 @@ l->entries[l->num_entries].start = fmap->areas[i].offset; l->entries[l->num_entries].end = fmap->areas[i].offset + fmap->areas[i].size - 1; l->entries[l->num_entries].included = false; - l->entries[l->num_entries].name = - strndup((const char *)fmap->areas[i].name, FMAP_STRLEN); + // MingW does not have strndup + len = strlen((const char *)fmap->areas[i].name); + if (len > (FMAP_STRLEN - 1)) + len = (FMAP_STRLEN - 1); + l->entries[l->num_entries].name = malloc(len + 1); + strncpy(l->entries[l->num_entries].name, + (const char *)fmap->areas[i].name, + len); + l->entries[l->num_entries].name[len] = '\0'; if (!l->entries[l->num_entries].name) { msg_gerr("Error adding layout entry: %s\n", strerror(errno)); return 1; -- To view, visit https://review.coreboot.org/c/flashrom/+/34621 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If418080bffff1f5961cacf2a300ea9c666682458 Gerrit-Change-Number: 34621 Gerrit-PatchSet: 1 Gerrit-Owner: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: cli_classic: Add convenient '--get-size' cli opt
by Edward O'Callaghan (Code Review) Oct. 4, 2019

Oct. 4, 2019

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/35592 ) Change subject: cli_classic: Add convenient '--get-size' cli opt ...................................................................... cli_classic: Add convenient '--get-size' cli opt We have this in the ChromiumOS fork of flashrom which we rely on to obtain the current flash chip in use. This ports it for upstream consumption. Change-Id: I8f002f3b2012aec4d26b0e81456697b9a5de28d6 Signed-off-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M cli_classic.c 1 file changed, 12 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/35592/1 diff --git a/cli_classic.c b/cli_classic.c index 4604043..52cea52 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -101,7 +101,7 @@ #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; #endif - int flash_name = 0; + int flash_name = 0, get_size = 0; int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; int dont_verify_it = 0, dont_verify_all = 0, list_supported = 0, operation_specified = 0; struct flashrom_layout *layout = NULL; @@ -112,6 +112,7 @@ OPTION_FMAP_FILE, OPTION_FLASH_CONTENTS, OPTION_FLASH_NAME, + OPTION_GET_SIZE, }; int ret = 0; @@ -133,6 +134,7 @@ {"image", 1, NULL, 'i'}, {"flash-contents", 1, NULL, OPTION_FLASH_CONTENTS}, {"flash-name", 0, NULL, OPTION_FLASH_NAME}, + {"get-size", 0, NULL, OPTION_GET_SIZE}, {"list-supported", 0, NULL, 'L'}, {"list-supported-wiki", 0, NULL, 'z'}, {"programmer", 1, NULL, 'p'}, @@ -302,6 +304,9 @@ case OPTION_FLASH_NAME: flash_name = 1; break; + case OPTION_GET_SIZE: + get_size = 1; + break; case 'L': if (++operation_specified > 1) { fprintf(stderr, "More than one operation " @@ -608,7 +613,7 @@ goto out_shutdown; } - if (!(read_it | write_it | verify_it | erase_it | flash_name)) { + if (!(read_it | write_it | verify_it | erase_it | flash_name | get_size)) { msg_ginfo("No operations were specified.\n"); goto out_shutdown; } @@ -625,6 +630,11 @@ } } + if (get_size) { + msg_ginfo("%d\n", fill_flash->chip->total_size * 1024); + goto out_shutdown; + } + if (layoutfile) { layout = get_global_layout(); } else if (ifd && (flashrom_layout_read_from_ifd(&layout, fill_flash, NULL, 0) || -- To view, visit https://review.coreboot.org/c/flashrom/+/35592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8f002f3b2012aec4d26b0e81456697b9a5de28d6 Gerrit-Change-Number: 35592 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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