Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
mb/**/devicetree.cb: Remove comments with lies
Change-Id: Iebc4e8c9eb0f44f84acf532ad12a5d064075a102 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb 7 files changed, 0 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/38047/1
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index bf4bec0..fa94dd9 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -16,7 +16,6 @@
chip soc/intel/skylake
- # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index b5e3191..85052ec 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/skylake
- # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" @@ -24,7 +23,6 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
- # Enable DPTF register "dptf_enable" = "0"
# FSP Configuration diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 7d7b58b..5d69e52 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -15,7 +15,6 @@
chip soc/intel/skylake
- # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index deac410..f69c482 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -8,7 +8,6 @@
register "gpu_pch_backlight_pwm_hz" = "200"
- # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index fd301cd..f5b8b99 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -8,7 +8,6 @@
register "gpu_pch_backlight_pwm_hz" = "200"
- # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index deb9869..b55ef41 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -1,5 +1,4 @@ chip soc/intel/skylake - # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index ee7c932..998f3dd 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/skylake
- # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
Patch Set 1: Code-Review+2
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
Patch Set 1: Code-Review+2
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
Patch Set 1:
Should the lies be corrected using general description without 'enable' or 'disable'? E.g. replace 'Enable Deep Sx states' by 'Deep Sx states'.
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
Patch Set 1: Code-Review-1
"liés"?
Bé nice !
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
Patch Set 1:
Patch Set 1:
Should the lies be corrected using general description without 'enable' or 'disable'? E.g. replace 'Enable Deep Sx states' by 'Deep Sx states'.
would be my preference as well
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove comments with lies ......................................................................
Patch Set 1:
Patch Set 1:
Patch Set 1:
Should the lies be corrected using general description without 'enable' or 'disable'? E.g. replace 'Enable Deep Sx states' by 'Deep Sx states'.
would be my preference as well
IMHO, it would be somewhat redundant, as the register names already give away what is being configured.
Hello HAOUAS Elyes, Frans Hendriks, Matt DeVillier, build bot (Jenkins), Nico Huber, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38047
to look at the new patch set (#2).
Change subject: mb/**/devicetree.cb: Remove untrue comments ......................................................................
mb/**/devicetree.cb: Remove untrue comments
Even if they were corrected, they just rephrase the code.
Change-Id: Iebc4e8c9eb0f44f84acf532ad12a5d064075a102 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb 7 files changed, 0 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/38047/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove untrue comments ......................................................................
Patch Set 2:
Patch Set 1: Code-Review-1
"liés"?
Bé nice !
To me, a lie is just something that is not true. I checked the wiktionary, and it says:
An intentionally false statement; an intentional falsehood.
Since these comments are not intentionally wrong (somebody just forgot to change them when doing copypasta), I agree it is not the best word to use. Thanks for noting! :)
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38047 )
Change subject: mb/**/devicetree.cb: Remove untrue comments ......................................................................
mb/**/devicetree.cb: Remove untrue comments
Even if they were corrected, they just rephrase the code.
Change-Id: Iebc4e8c9eb0f44f84acf532ad12a5d064075a102 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38047 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Frans Hendriks fhendriks@eltan.com --- M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb 7 files changed, 0 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Frans Hendriks: Looks good to me, approved
Objections: HAOUAS Elyes: I would prefer that you didn't submit this
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index bf4bec0..fa94dd9 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -16,7 +16,6 @@
chip soc/intel/skylake
- # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index b5e3191..85052ec 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/skylake
- # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" @@ -24,7 +23,6 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
- # Enable DPTF register "dptf_enable" = "0"
# FSP Configuration diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 7d7b58b..5d69e52 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -15,7 +15,6 @@
chip soc/intel/skylake
- # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index deac410..f69c482 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -8,7 +8,6 @@
register "gpu_pch_backlight_pwm_hz" = "200"
- # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index fd301cd..f5b8b99 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -8,7 +8,6 @@
register "gpu_pch_backlight_pwm_hz" = "200"
- # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index deb9869..b55ef41 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -1,5 +1,4 @@ chip soc/intel/skylake - # Enable deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "0" diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index ee7c932..998f3dd 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/skylake
- # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
Angel Pons (Code Review) -
Frans Hendriks (Code Review)
-
HAOUAS Elyes (Code Review)
-
Matt DeVillier (Code Review)
-
Nico Huber (Code Review)