[M] Change in coreboot[master]: soc/intel/alderlake: Add romstage early graphics support

[Jérémy Compostella (Code Review)]

Attention is currently required from: Bora Guvendik, Anil Kumar K, Hannah Williams, Cliff Huang, Paul Menzel, Angel Pons, Arthur Heymans, Zhixing Ma, Nico Huber, Michał Żygowski, Subrata Banik, Nick Vaccaro, Boris Mittelberg, Elyes Haouas.

Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70303 )

Change subject: soc/intel/alderlake: Add romstage early graphics support
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Patch Set 15:

(3 comments)

File src/soc/intel/alderlake/romstage/graphics.c:

https://review.coreboot.org/c/coreboot/+/70303/comment/b8105559_4f16e769 
PS13, Line 3: <arch/cpu.h>
> Please include <cpu/cpu. […]

This one is not even needed anymore.

https://review.coreboot.org/c/coreboot/+/70303/comment/a13cee1c_81d64f6b 
PS13, Line 4: <arch/mmio.h>
> Please include <device/mmio. […]

Done.

https://review.coreboot.org/c/coreboot/+/70303/comment/38f8987d_31b8a622 
PS13, Line 14: static void wait_txt_clear(void)
             : {
             : 	struct cpuid_result cp = cpuid_ext(1, 0);
             : 
             : 	/* Check if TXT is supported */
             : 	if (!(cp.ecx & (1 << 6)))
             : 		return;
             : 
             : 	/* Some TXT public bit */
             : 	if (!(read32((void *)0xfed30010) & 1))
             : 		return;
             : 
             : 	/* Wait for TXT clear */
             : 	while (!(read8((void *)0xfed40000) & (1 << 7)))
             : 		;
             : }
> Thanks Jeremy! […]

We still need a simple read to trigger PCH operation.