Change in coreboot[master]: soc/mediatek: Adjust log level of calibration for spmi clock

[Paul Menzel (Code Review)]

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64090 )

Change subject: soc/mediatek: Adjust log level of calibration for spmi clock
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Patch Set 1:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/64090/comment/ba9cc913_30f19534 
PS1, Line 7: soc/mediatek: Adjust log level of calibration for spmi clock
Be more specific:
> Demote log level of SPMI clock calibration problem to warning

https://review.coreboot.org/c/coreboot/+/64090/comment/a91de5c7_e360ee48 
PS1, Line 9: expeted
expected

https://review.coreboot.org/c/coreboot/+/64090/comment/242012b0_db644c70 
PS1, Line 11: all data, the system will enter "die". Therefore, we adjust the log level
Please wrap lines after 72 characters per line.

File src/soc/mediatek/common/pmif_spmi.c:

https://review.coreboot.org/c/coreboot/+/64090/comment/b217c71f_42cdce23 
PS1, Line 47: 		printk(BIOS_WARNING, "%s next, slvid:%d rdata = 0x%x.\n",
These look like debug messages. If it’s a warning, than the message needs to be understandable by the user.