Jérémy Compostella has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81343?usp=email )
Change subject: cpu/x86: Use correct config flag for 1GiB page table ......................................................................
cpu/x86: Use correct config flag for 1GiB page table
The commit below uses USE_1G_PAGETABLES config flag instead of the correct USE_1G_PAGES_TLB. "commit ecbc243a45de3b7894e2fe6c8e22b5d07172274b ("cpu/x86: Add 1GiB pages for memory access up to 512GiB")"
Signed-off-by: Bora Guvendik bora.guvendik@intel.com Change-Id: Ic19812bc1f90cbe7d3739c42a0314b3650e0501d Reviewed-on: https://review.coreboot.org/c/coreboot/+/81343 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Jérémy Compostella jeremy.compostella@intel.com --- M src/cpu/x86/64bit/Makefile.mk 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: Arthur Heymans: Looks good to me, approved Jérémy Compostella: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/cpu/x86/64bit/Makefile.mk b/src/cpu/x86/64bit/Makefile.mk index 680ab2d..a8dc1a2 100644 --- a/src/cpu/x86/64bit/Makefile.mk +++ b/src/cpu/x86/64bit/Makefile.mk @@ -3,7 +3,7 @@ all_x86-y += mode_switch.S all_x86-y += mode_switch2.S
-ifeq ($(CONFIG_USE_1G_PAGETABLES),y) +ifeq ($(CONFIG_USE_1G_PAGES_TLB),y) PAGETABLE_SRC := pt1G.S else PAGETABLE_SRC := pt.S