Change in coreboot[master]: soc/intel/apollolake: Add config option for enabling hotplug

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/25187

Change subject: soc/intel/apollolake: Add config option for enabling hotplug
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soc/intel/apollolake: Add config option for enabling hotplug

PcieRpHotPlug in apollolake UPD is default enabled. This change adds a
config option to enable hotplug only if explicitly requested by
mainboard. This changes the default behavior on all apollolake boards
to have hotplug disabled.

BUG=b:74633273

Change-Id: I572c054d31aaf5d43a79c4b1773ec9356da48d9d
Signed-off-by: Furquan Shaikh 
---
M src/soc/intel/apollolake/chip.c
M src/soc/intel/apollolake/chip.h
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/25187/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 6006773..af145c0 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -534,6 +534,9 @@
    memcpy(silconfig->PcieRpClkReqNumber, cfg->pcie_rp_clkreq_pin,
           sizeof(silconfig->PcieRpClkReqNumber));

+	memcpy(silconfig->PcieRpHotPlug, cfg->pcie_rp_hotplug_enable,
+	       sizeof(silconfig->PcieRpHotPlug));
+
    if (cfg->emmc_tx_cmd_cntl != 0)
    	silconfig->EmmcTxCmdCntl = cfg->emmc_tx_cmd_cntl;
    if (cfg->emmc_tx_data_cntl1 != 0)
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 7a1d16a..fe845ab 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -46,6 +46,9 @@
     */
    uint8_t pcie_rp_clkreq_pin[MAX_PCIE_PORTS];

+	/* Enable/disable hot-plug for root ports (0 = disable, 1 = enable). */
+	uint8_t pcie_rp_hotplug_enable[MAX_PCIE_PORTS];
+
    /* [14:8] DDR mode Number of dealy elements.Each = 125pSec.
     * [6:0] SDR mode Number of dealy elements.Each = 125pSec.
     */