Patch set updated for coreboot: dedf8c2 intel/i945: Add 0x277* PCI ID for Intel 945G/945GZ/945GC
HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6192
-gerrit
commit dedf8c264b897dc90ae4c4c394340fbd39d0e573 Author: Elyes HAOUAS ehaouas@noos.fr Date: Fri Jul 25 19:00:50 2014 +0200
intel/i945: Add 0x277* PCI ID for Intel 945G/945GZ/945GC
Change-Id: I263eeba8fcfdfe9253449913bb46956c796ac825 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/northbridge/intel/i945/Kconfig | 3 ++- src/northbridge/intel/i945/acpi.c | 5 ++++- src/northbridge/intel/i945/gma.c | 16 ++++++++++++++-- src/northbridge/intel/i945/northbridge.c | 4 ++++ 4 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 360b2ab..99ea1fd 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -41,7 +41,8 @@ config BOOTBLOCK_NORTHBRIDGE_INIT
config VGA_BIOS_ID string - default "8086,27a2" + default "8086,27a2" if NORTHBRIDGE_INTEL_SUBTYPE_I945GM + default "8086,2772" if NORTHBRIDGE_INTEL_SUBTYPE_I945GC
config CHANNEL_XOR_RANDOMIZATION bool diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index e05bd58..81dbd31 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -35,8 +35,11 @@ unsigned long acpi_fill_mcfg(unsigned long current) u32 pciexbar = 0; u32 pciexbar_reg; int max_buses; - +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM dev = dev_find_device(0x8086, 0x27a0, 0); +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC + dev = dev_find_device(0x8086, 0x2770, 0); +#endif if (!dev) return current;
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index c04483e..017874a 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -119,6 +119,18 @@ static struct pci_operations gma_pci_ops = { .set_subsystem = gma_set_subsystem, };
+static const unsigned short i945_gma_func0_ids[] = { + 0x27a2, + 0x2772, + 0 +}; + +static const unsigned short i945_gma_func1_ids[] = { + 0x27a6, + 0x2776, + 0 +}; + static struct device_operations gma_func0_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, @@ -144,11 +156,11 @@ static struct device_operations gma_func1_ops = { static const struct pci_driver i945_gma_func0_driver __pci_driver = { .ops = &gma_func0_ops, .vendor = PCI_VENDOR_ID_INTEL, - .device = 0x27a2, + .device = i945_gma_func0_ids, };
static const struct pci_driver i945_gma_func1_driver __pci_driver = { .ops = &gma_func1_ops, .vendor = PCI_VENDOR_ID_INTEL, - .device = 0x27a6, + .device = i945_gma_func1_ids, }; diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 68d6d91..ff9f8bb 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -270,7 +270,11 @@ static struct device_operations mc_ops = { static const struct pci_driver mc_driver __pci_driver = { .ops = &mc_ops, .vendor = PCI_VENDOR_ID_INTEL, +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM .device = 0x27a0, +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC + .device = 0x2770, +#endif };
static void cpu_bus_init(device_t dev)
-
HAOUAS Elyes