Julius Werner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introducing a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c M src/mainboard/google/trogdor/chromeos.c 4 files changed, 15 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/1
diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig index 8d5bced..cb9f361 100644 --- a/src/mainboard/google/trogdor/Kconfig +++ b/src/mainboard/google/trogdor/Kconfig @@ -4,6 +4,9 @@
if BOARD_GOOGLE_TROGDOR_COMMON
+config TROGDOR_REV0 + def_bool y + config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 @@ -32,11 +35,13 @@
config DRIVER_TPM_SPI_BUS hex - default 0x6 + default 0x6 if TROGDOR_REV0 + default 0x0
config EC_GOOGLE_CHROMEEC_SPI_BUS hex - default 0x0 + default 0x0 if TROGDOR_REV0 + default 0x6
########################################################## #### Update below when adding a new derivative board. #### diff --git a/src/mainboard/google/trogdor/board.h b/src/mainboard/google/trogdor/board.h index e43f7cc..9c727b3 100644 --- a/src/mainboard/google/trogdor/board.h +++ b/src/mainboard/google/trogdor/board.h @@ -16,6 +16,7 @@ #ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ #define _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
+#include <boardid.h> #include <gpio.h> #include <soc/gpio.h>
@@ -23,7 +24,8 @@ #define GPIO_AP_EC_INT GPIO(94) #define GPIO_AP_SUSPEND GPIO(20) #define GPIO_WP_STATE GPIO(42) -#define GPIO_H1_AP_INT GPIO(21) +#define GPIO_H1_AP_INT (board_id() < 1 ? GPIO(21) : GPIO(42)) +#define GPIO_SD_CD_L GPIO(69)
enum gpio_pull { GPIO_PULLNONE = 0, diff --git a/src/mainboard/google/trogdor/bootblock.c b/src/mainboard/google/trogdor/bootblock.c index e9a8ffe..2f83c6c 100644 --- a/src/mainboard/google/trogdor/bootblock.c +++ b/src/mainboard/google/trogdor/bootblock.c @@ -15,14 +15,12 @@
#include <bootblock_common.h> #include "board.h" -#include <soc/qcom_qup_se.h> #include <soc/qupv3_spi.h> #include <soc/gpio.h>
void bootblock_mainboard_init(void) { setup_chromeos_gpios(); - qup_spi_init(QUPV3_1_SE0, 1010 * KHz); /* H1 SPI */ - qup_spi_init(QUPV3_0_SE0, 1010 * KHz); /* EC SPI */ - gpio_input_irq(GPIO_H1_AP_INT, IRQ_TYPE_RISING_EDGE, GPIO_PULLUP); + qup_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1010 * KHz); + qup_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 1010 * KHz); } diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c index 4a78c85..94c62ff 100644 --- a/src/mainboard/google/trogdor/chromeos.c +++ b/src/mainboard/google/trogdor/chromeos.c @@ -29,7 +29,7 @@ gpio_input_pullup(GPIO_AP_EC_INT); gpio_output(GPIO_AP_SUSPEND, 1); gpio_input(GPIO_WP_STATE); - gpio_input_pullup(GPIO_H1_AP_INT); + gpio_input_irq(GPIO_H1_AP_INT, IRQ_TYPE_RISING_EDGE, GPIO_PULL_UP); }
void fill_lb_gpios(struct lb_gpios *gpios) @@ -43,6 +43,8 @@ "write protect"}, {GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT), "TPM interrupt"}, + {GPIO_SD_CD_L.addr, ACTIVE_LOW, gpio_get(GPIO_SD_CD_L), + "SD card detect"}, };
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); @@ -52,4 +54,3 @@ { return gpio_irq_status(GPIO_H1_AP_INT); } -
Ravi kumar has uploaded a new patch set (#4) to the change originally created by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introducing a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c M src/mainboard/google/trogdor/chromeos.c 4 files changed, 15 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/4
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/38773/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38773/4//COMMIT_MSG@12 PS4, Line 12: Introducing Introduce
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
Patch Set 9: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/38773/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38773/4//COMMIT_MSG@12 PS4, Line 12: Introducing
Introduce
*ping*
T.mike, mind cleaning this up in your next rebase?
Ravi kumar has uploaded a new patch set (#10) to the change originally created by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introducing a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c M src/mainboard/google/trogdor/chromeos.c 4 files changed, 14 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/10
mturney mturney has uploaded a new patch set (#11) to the change originally created by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introducing a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c M src/mainboard/google/trogdor/chromeos.c 4 files changed, 14 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/11
Ravi kumar has uploaded a new patch set (#13) to the change originally created by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introduce a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c 3 files changed, 10 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/13
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
Patch Set 13: Code-Review+2
Ravi kumar has uploaded a new patch set (#15) to the change originally created by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introduce a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c 3 files changed, 10 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/15
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
Patch Set 15: Code-Review+2
mturney mturney has uploaded a new patch set (#16) to the change originally created by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introduce a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c 3 files changed, 10 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38773/16
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
Patch Set 20: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/38773/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38773/4//COMMIT_MSG@12 PS4, Line 12: Introducing
*ping* […]
Done
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introduce a Kconfig to handle this instead.
Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner jwerner@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/38773 Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/bootblock.c 3 files changed, 10 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved
diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig index 76a89fb..dfd98f0 100644 --- a/src/mainboard/google/trogdor/Kconfig +++ b/src/mainboard/google/trogdor/Kconfig @@ -4,6 +4,9 @@
if BOARD_GOOGLE_TROGDOR_COMMON
+config TROGDOR_REV0 + def_bool y + config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 @@ -32,11 +35,13 @@
config DRIVER_TPM_SPI_BUS hex - default 0x6 + default 0x6 if TROGDOR_REV0 + default 0x0
config EC_GOOGLE_CHROMEEC_SPI_BUS hex - default 0x0 + default 0x0 if TROGDOR_REV0 + default 0x6
########################################################## #### Update below when adding a new derivative board. #### diff --git a/src/mainboard/google/trogdor/board.h b/src/mainboard/google/trogdor/board.h index 93196d2..fa2fb9f 100644 --- a/src/mainboard/google/trogdor/board.h +++ b/src/mainboard/google/trogdor/board.h @@ -3,6 +3,7 @@ #ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ #define _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
+#include <boardid.h> #include <gpio.h> #include <soc/gpio.h>
diff --git a/src/mainboard/google/trogdor/bootblock.c b/src/mainboard/google/trogdor/bootblock.c index b17c2e7..710a2e7 100644 --- a/src/mainboard/google/trogdor/bootblock.c +++ b/src/mainboard/google/trogdor/bootblock.c @@ -2,12 +2,11 @@
#include <bootblock_common.h> #include "board.h" -#include <soc/qcom_qup_se.h> #include <soc/qupv3_spi.h>
void bootblock_mainboard_init(void) { setup_chromeos_gpios(); - qup_spi_init(QUPV3_1_SE0, 1010 * KHz); /* H1 SPI */ - qup_spi_init(QUPV3_0_SE0, 1010 * KHz); /* EC SPI */ + qup_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1010 * KHz); + qup_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 1010 * KHz); }
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38773 )
Change subject: trogdor: Add support for rev1 ......................................................................
Patch Set 21:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/3349 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3348 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3347 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/3346
Please note: This test is under development and might not be accurate at all!