Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: brya ......................................................................
brya
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/bootblock.c A src/mainboard/google/brya/chromeos.fmd A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 7 files changed, 68 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/47819/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig new file mode 100644 index 0000000..745a61d --- /dev/null +++ b/src/mainboard/google/brya/Kconfig @@ -0,0 +1,29 @@ +config BOARD_GOOGLE_BASEBOARD_BRYA + def_bool n + select BOARD_ROMSIZE_KB_32768 + select HAVE_ACPI_TABLES + select SOC_INTEL_ALDERLAKE + +if BOARD_GOOGLE_BASEBOARD_BRYA + +config BASEBOARD_BRYA_LAPTOP + def_bool n + select SYSTEM_TYPE_LAPTOP + +config DEVICETREE + string + default "variants/baseboard/devicetree.cb" + +config MAINBOARD_DIR + string + default "google/brya" + +config MAINBOARD_FAMILY + string + default "Google_Brya" if BOARD_GOOGLE_BRYA0 + +config MAINBOARD_PART_NUMBER + string + default "brya" if BOARD_GOOGLE_BRYA0 + +endif # BOARD_GOOGLE_BASEBOARD_BRYA diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name new file mode 100644 index 0000000..db2252a --- /dev/null +++ b/src/mainboard/google/brya/Kconfig.name @@ -0,0 +1,4 @@ +config BOARD_GOOGLE_BRYA0 + bool "Brya 0" + select BOARD_GOOGLE_BASEBOARD_BRYA + select BASEBOARD_BRYA_LAPTOP diff --git a/src/mainboard/google/brya/board_info.txt b/src/mainboard/google/brya/board_info.txt new file mode 100644 index 0000000..dad16fa --- /dev/null +++ b/src/mainboard/google/brya/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Brya +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/brya/bootblock.c b/src/mainboard/google/brya/bootblock.c new file mode 100644 index 0000000..95f7497 --- /dev/null +++ b/src/mainboard/google/brya/bootblock.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <bootblock_common.h> + +void bootblock_mainboard_init(void) +{ + variant_configure_early_gpio_pads(); +} diff --git a/src/mainboard/google/brya/chromeos.fmd b/src/mainboard/google/brya/chromeos.fmd new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/google/brya/chromeos.fmd diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl new file mode 100644 index 0000000..10d08e2 --- /dev/null +++ b/src/mainboard/google/brya/dsdt.asl @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 // OEM revision +) +{ +} diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb new file mode 100644 index 0000000..fbd7d72 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +chip soc/intel/alderlake + device cpu_cluster 0 on + device lapic 0 on end + end +end
Tim Wawrzynczak has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
mb/google/brya: Add new google brya mainboard
This commit is a stub for brya, which is a an Intel Alder Lake-P reference platform.
BUG=b:173562731 TEST=util/abuild/abuild -p none -t google/brya -a -c max
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/bootblock.c A src/mainboard/google/brya/chromeos.fmd A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 7 files changed, 68 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/47819/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47819
to look at the new patch set (#3).
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
mb/google/brya: Add new google brya mainboard
This commit is a stub for brya, which is a an Intel Alder Lake-P reference platform.
BUG=b:173562731 TEST=util/abuild/abuild -p none -t google/brya -a -c max
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/chromeos.fmd A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 6 files changed, 58 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/47819/3
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47819
to look at the new patch set (#4).
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
mb/google/brya: Add new google brya mainboard
This commit is a stub for brya, which is a an Intel Alder Lake-P reference platform.
BUG=b:173562731 TEST=util/abuild/abuild -p none -t google/brya -a -c max
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 5 files changed, 58 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/47819/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 4: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/47819/4/src/mainboard/google/brya/K... File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/47819/4/src/mainboard/google/brya/K... PS4, Line 23: Google_Brya Google_Brya0?
Hello build bot (Jenkins), Furquan Shaikh, Alan Lee, Amanda Hwang, EricR Lai, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47819
to look at the new patch set (#5).
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
mb/google/brya: Add new google brya mainboard
This commit is a stub for brya, which is a an Intel Alder Lake-P reference platform.
BUG=b:173562731 TEST=util/abuild/abuild -p none -t google/brya -a -c max
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 5 files changed, 58 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/47819/5
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47819/4/src/mainboard/google/brya/K... File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/47819/4/src/mainboard/google/brya/K... PS4, Line 23: Google_Brya
Google_Brya0?
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 5: Code-Review+2
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 5: Code-Review+2
Just curoius why use brya0?
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
mb/google/brya: Add new google brya mainboard
This commit is a stub for brya, which is a an Intel Alder Lake-P reference platform.
BUG=b:173562731 TEST=util/abuild/abuild -p none -t google/brya -a -c max
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47819 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: EricR Lai ericr_lai@compal.corp-partner.google.com --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 5 files changed, 58 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved EricR Lai: Looks good to me, approved
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig new file mode 100644 index 0000000..f538ade --- /dev/null +++ b/src/mainboard/google/brya/Kconfig @@ -0,0 +1,29 @@ +config BOARD_GOOGLE_BASEBOARD_BRYA + def_bool n + select BOARD_ROMSIZE_KB_32768 + select HAVE_ACPI_TABLES + select SOC_INTEL_ALDERLAKE + +if BOARD_GOOGLE_BASEBOARD_BRYA + +config BASEBOARD_BRYA_LAPTOP + def_bool n + select SYSTEM_TYPE_LAPTOP + +config DEVICETREE + string + default "variants/baseboard/devicetree.cb" + +config MAINBOARD_DIR + string + default "google/brya" + +config MAINBOARD_FAMILY + string + default "Google_Brya0" if BOARD_GOOGLE_BRYA0 + +config MAINBOARD_PART_NUMBER + string + default "brya" if BOARD_GOOGLE_BRYA0 + +endif # BOARD_GOOGLE_BASEBOARD_BRYA diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name new file mode 100644 index 0000000..db2252a --- /dev/null +++ b/src/mainboard/google/brya/Kconfig.name @@ -0,0 +1,4 @@ +config BOARD_GOOGLE_BRYA0 + bool "Brya 0" + select BOARD_GOOGLE_BASEBOARD_BRYA + select BASEBOARD_BRYA_LAPTOP diff --git a/src/mainboard/google/brya/board_info.txt b/src/mainboard/google/brya/board_info.txt new file mode 100644 index 0000000..dad16fa --- /dev/null +++ b/src/mainboard/google/brya/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Brya +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl new file mode 100644 index 0000000..10d08e2 --- /dev/null +++ b/src/mainboard/google/brya/dsdt.asl @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 // OEM revision +) +{ +} diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb new file mode 100644 index 0000000..fbd7d72 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +chip soc/intel/alderlake + device cpu_cluster 0 on + device lapic 0 on end + end +end
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 6:
Patch Set 5: Code-Review+2
Just curoius why use brya0?
This is primarily to mitigate the problems we run across by using earlier silicon; we need multiple silicon revs, which often have incompatible Intel binaries, so for Volteer, we created multiple board variants for the reference (ripto, volteer, volteer2) for the different Si revs. Trying to stay ahead of it this time, so all of the reference boards will be brya0, brya1, brya2, etc. 😊
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 6:
Patch Set 6:
Patch Set 5: Code-Review+2
Just curoius why use brya0?
This is primarily to mitigate the problems we run across by using earlier silicon; we need multiple silicon revs, which often have incompatible Intel binaries, so for Volteer, we created multiple board variants for the reference (ripto, volteer, volteer2) for the different Si revs. Trying to stay ahead of it this time, so all of the reference boards will be brya0, brya1, brya2, etc. 😊
I see. Hope not too much lol.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47819 )
Change subject: mb/google/brya: Add new google brya mainboard ......................................................................
Patch Set 6:
Patch Set 6:
Patch Set 6:
Patch Set 5: Code-Review+2
Just curoius why use brya0?
This is primarily to mitigate the problems we run across by using earlier silicon; we need multiple silicon revs, which often have incompatible Intel binaries, so for Volteer, we created multiple board variants for the reference (ripto, volteer, volteer2) for the different Si revs. Trying to stay ahead of it this time, so all of the reference boards will be brya0, brya1, brya2, etc. 😊
I see. Hope not too much lol.
agreed 😄
-
EricR Lai (Code Review) -
Furquan Shaikh (Code Review)
-
Patrick Georgi (Code Review)
-
Tim Wawrzynczak (Code Review)