Change in coreboot[master]: mb/amd/db-ft3b-lc: Switch away from ROMCC_BOOTBLOCK

[Mike Banon (Code Review)]

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37981 )

Change subject: mb/amd/db-ft3b-lc: Switch away from ROMCC_BOOTBLOCK
......................................................................

mb/amd/db-ft3b-lc: Switch away from ROMCC_BOOTBLOCK

Warning: not tested on hardware.

Signed-off-by: Mike Banon 
Change-Id: Ia3539702b2cdd3a9ba9b80a5ca72b274dc30142c
---
M src/mainboard/amd/db-ft3b-lc/Kconfig
M src/mainboard/amd/db-ft3b-lc/Kconfig.name
M src/mainboard/amd/db-ft3b-lc/Makefile.inc
A src/mainboard/amd/db-ft3b-lc/bootblock.c
D src/mainboard/amd/db-ft3b-lc/romstage.c
5 files changed, 25 insertions(+), 60 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/37981/1

diff --git a/src/mainboard/amd/db-ft3b-lc/Kconfig b/src/mainboard/amd/db-ft3b-lc/Kconfig
index f17d2d3..17af79c 100644
--- a/src/mainboard/amd/db-ft3b-lc/Kconfig
+++ b/src/mainboard/amd/db-ft3b-lc/Kconfig
@@ -14,15 +14,11 @@
 # GNU General Public License for more details.
 #

-config BOARD_AMD_DB_FT3B_LC
-	def_bool n
-
 if BOARD_AMD_DB_FT3B_LC

config BOARD_SPECIFIC_OPTIONS
    def_bool y
    #select BINARYPI_LEGACY_WRAPPER
-	#select ROMCC_BOOTBLOCK
    select CPU_AMD_PI_00730F01
    select NORTHBRIDGE_AMD_PI_00730F01
    select SOUTHBRIDGE_AMD_PI_AVALON
diff --git a/src/mainboard/amd/db-ft3b-lc/Kconfig.name b/src/mainboard/amd/db-ft3b-lc/Kconfig.name
index 3197a70..7caf95d 100644
--- a/src/mainboard/amd/db-ft3b-lc/Kconfig.name
+++ b/src/mainboard/amd/db-ft3b-lc/Kconfig.name
@@ -1,3 +1,2 @@
-# Disabled
-#config BOARD_AMD_DB_FT3B_LC
-#	bool "DB-FT3b-LC"
+config BOARD_AMD_DB_FT3B_LC
+	bool "DB-FT3b-LC"
diff --git a/src/mainboard/amd/db-ft3b-lc/Makefile.inc b/src/mainboard/amd/db-ft3b-lc/Makefile.inc
index 97c761f..ba3a0d48 100644
--- a/src/mainboard/amd/db-ft3b-lc/Makefile.inc
+++ b/src/mainboard/amd/db-ft3b-lc/Makefile.inc
@@ -13,6 +13,8 @@
 # GNU General Public License for more details.
 #

+bootblock-y += bootblock.c
+
 romstage-y += BiosCallOuts.c
 romstage-y += OemCustomize.c

diff --git a/src/mainboard/amd/db-ft3b-lc/bootblock.c b/src/mainboard/amd/db-ft3b-lc/bootblock.c
new file mode 100644
index 0000000..20a1403
--- /dev/null
+++ b/src/mainboard/amd/db-ft3b-lc/bootblock.c
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <amdblocks/acpimmio.h>
+#include <bootblock_common.h>
+
+void bootblock_mainboard_early_init(void)
+{
+	/* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
+	pm_write8(0xea, 0x1);
+}
diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c
deleted file mode 100644
index a3ad3a1..0000000
--- a/src/mainboard/amd/db-ft3b-lc/romstage.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <arch/cpu.h>
-#include <cpu/x86/lapic.h>
-#include <console/console.h>
-#include <northbridge/amd/agesa/state_machine.h>
-#include <southbridge/amd/pi/hudson/hudson.h>
-
-static void romstage_main_template(void)
-{
-	u32 val;
-
-	/*
-	 *  In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
-	 *  LpcClk[1:0]".  This following register setting has been
-	 *  replicated in every reference design since Parmer, so it is
-	 *  believed to be required even though it is not documented in
-	 *  the SoC BKDGs.  Without this setting, there is no serial
-	 *  output.
-	 */
-	outb(0xD2, 0xcd6);
-	outb(0x00, 0xcd7);
-
-	if (!cpu_init_detectedx && boot_cpu()) {
-		post_code(0x30);
-
-		post_code(0x31);
-		console_init();
-	}
-}
-
-void agesa_postcar(struct sysinfo *cb)
-{
-	/* After AMD_INIT_ENV -> move to ramstage ? */
-	outb(0xEA, 0xCD6);
-	outb(0x1, 0xcd7);
-}

[Mike Banon (Code Review)]

Mike Banon has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37981 )

Change subject: mb/amd/db-ft3b-lc: Switch away from ROMCC_BOOTBLOCK
......................................................................

Abandoned

These remaining-with-ROMCC rare boards seem to be broken: even if switched away from ROMCC_BOOTBLOCK, their builds are failing because of the other reasons (unrelated to new bootblock.c file). I am abandoning their "switch away from ROMCC_BOOTBLOCK" changes (CB:37975 - CB:37982), but if anyone cares about these boards - they can restore these changes and advance. Read more at CB:37750.

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37981 )

Change subject: mb/amd/db-ft3b-lc: Switch away from ROMCC_BOOTBLOCK
......................................................................

Patch Set 1:

it needs more work ....
I think it needs to switch away from BINARYPI_LEGACY_WRAPPER
(see https://review.coreboot.org/c/coreboot/+/32363 )

but in any case, if there is no test on real hardware, this mainboard (and the others) will de be deleted.