Change in coreboot[master]: mainboard/google/fizz: Enable Devslp for SATA port 1

[Kane Chen (Code Review)]

Kane Chen has posted comments on this change. ( https://review.coreboot.org/21765 )

Change subject: mainboard/google/fizz: Enable Devslp for SATA port 1
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/21765/1/src/mainboard/google/fizz/gpio.h
File src/mainboard/google/fizz/gpio.h:

https://review.coreboot.org/#/c/21765/1/src/mainboard/google/fizz/gpio.h@170
PS1, Line 170: * SATA_DEVSLP0 */	PAD_CFG_GPI(GPP
is this pin floating ?
If so, it's better to set NC pin.
thank you