Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/28986 )
Change subject: mb/cavium/cn8100_sff_evb: Only expose two UARTs ......................................................................
mb/cavium/cn8100_sff_evb: Only expose two UARTs
Only two UARTs are connected to the FTDI UART USB chip.
Change-Id: Id5ae7266ce44c9f64c7f7aeaf23c49122041f47a Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/28986 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com --- M src/mainboard/cavium/cn8100_sff_evb/devicetree.cb 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb b/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb index 3398e9a..00be155 100644 --- a/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb +++ b/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb @@ -93,11 +93,11 @@ end chip soc/cavium/common/pci register "secure" = "1" - device pci 08.2 on end # UUA2 + device pci 08.2 off end # UUA2 end chip soc/cavium/common/pci register "secure" = "1" - device pci 08.3 on end # UUA3 + device pci 08.3 off end # UUA3 end chip soc/cavium/common/pci register "secure" = "1"