Attention is currently required from: Hung-Te Lin, Jarried Lin.
Zhaoqing Jiu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86551?usp=email )
Change subject: soc/mediatek/mt8196: Save HW protect temperature to SRAM ......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86551/comment/fd8a0644_18bf387a?usp... : PS2, Line 10: after the system suspends and resumes
Does this effect resume time?
No, won't affect resume time. We just give a correct value here, not affect logic.
File src/soc/mediatek/mt8196/thermal.c:
https://review.coreboot.org/c/coreboot/+/86551/comment/4a63a91e_562c5023?usp... : PS2, Line 606: if (tc_num == LVTS_AP_CONTROLLER0) : tc_index = 0; : else if (tc_num == LVTS_AP_CONTROLLER1) : tc_index = 1; : : if (tc_index != 0xff) { : thermal_write_reboot_msr_sram(tc_index, raw_high); : if (tc_index == 0) : thermal_write_reboot_temp_sram(tc->reboot_temperature); : }
I feel like the flow should be controlled by the `lvts_thermal_controller` struct, because that's ho […]
not reserve sram slot for controllers 2 and 3.
File src/soc/mediatek/mt8196/thermal_sram.c:
https://review.coreboot.org/c/coreboot/+/86551/comment/493a2ef0_21a0ce9e?usp... : PS2, Line 68: write32
write32p ?
there will be compile error if use write32p