Change in coreboot[master]: mainboard/intel/coffeelake_rvp: Ensure MP Initialization

[Kin Wai Ng (Code Review)]

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,

I'd like you to do a code review. Please visit

https://review.coreboot.org/25228

to review the following change.

Change subject: mainboard/intel/coffeelake_rvp: Ensure MP Initialization
......................................................................

mainboard/intel/coffeelake_rvp: Ensure MP Initialization

Do not skip MP Initialization (including BSP).

Change-Id: If9c66045957ee9f973c7ce430efa4f5d3d5eed84
Signed-off-by: Ng Kin Wai 
---
M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/25228/1

diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
old mode 100644
new mode 100755
index 1ea7940..3867ff9
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
@@ -6,7 +6,7 @@

# FSP configuration
    register "SaGv" = "3"
-	register "FspSkipMpInit" = "1"
+	register "FspSkipMpInit" = "0"
    register "SmbusEnable" = "1"
    register "ScsEmmcEnabled" = "1"
    register "ScsEmmcHs400Enabled" = "1"