[S] Change in coreboot[master]: soc/intel/denverton_ns: Implement PCIe post config + lock

[Martin L Roth (Code Review)]

Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/25442?usp=email )

Change subject: soc/intel/denverton_ns: Implement PCIe post config + lock
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Abandoned

This patch has not been touched in over 12 months. Anyone who wants to take over work on this patch, please feel free to restore it and do any work needed to get it merged. If you create a new patch based on this work, please credit the original author.