Change in coreboot[master]: mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock

[Michael Niewöhner (Code Review)]

Michael Niewöhner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35477 )

Change subject: mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock
......................................................................

mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock

CdClock does not need to be set because the board does not use IGD.

Change-Id: I6835ccdf80530f9efc6fdeb0363dcf9267f99d21
Signed-off-by: Michael Niewöhner 
---
M src/mainboard/supermicro/x11ssh/ramstage.c
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/35477/1

diff --git a/src/mainboard/supermicro/x11ssh/ramstage.c b/src/mainboard/supermicro/x11ssh/ramstage.c
index 2672f73..a37d2d2 100644
--- a/src/mainboard/supermicro/x11ssh/ramstage.c
+++ b/src/mainboard/supermicro/x11ssh/ramstage.c
@@ -20,7 +20,6 @@
    /* Configure pads prior to SiliconInit() in case there's any
     * dependencies during hardware initialization. */
    gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
-	params->CdClock = 3;

/* This must be one, otherwise FSP crashes ... */
    params->PchHdaVcType = 0x1;

[Patrick Georgi (Code Review)]

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35477 )

Change subject: mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock
......................................................................

Patch Set 1: Code-Review+2

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35477 )

Change subject: mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock
......................................................................

mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock

CdClock does not need to be set because the board does not use IGD.

Change-Id: I6835ccdf80530f9efc6fdeb0363dcf9267f99d21
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35477
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Georgi 
---
M src/mainboard/supermicro/x11ssh/ramstage.c
1 file changed, 0 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved

diff --git a/src/mainboard/supermicro/x11ssh/ramstage.c b/src/mainboard/supermicro/x11ssh/ramstage.c
index 2672f73..a37d2d2 100644
--- a/src/mainboard/supermicro/x11ssh/ramstage.c
+++ b/src/mainboard/supermicro/x11ssh/ramstage.c
@@ -20,7 +20,6 @@
    /* Configure pads prior to SiliconInit() in case there's any
     * dependencies during hardware initialization. */
    gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
-	params->CdClock = 3;

/* This must be one, otherwise FSP crashes ... */
    params->PchHdaVcType = 0x1;