[M] Change in coreboot[main]: mb/starlabs/starlite_adl: Make the memory speed configurable
Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84635?usp=email )
(
10 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starlite_adl: Make the memory speed configurable ......................................................................
mb/starlabs/starlite_adl: Make the memory speed configurable
The memory used in the StarLite Mk V supports 5500MT/s through 7500MT/s. Intel recommends 5500MT/s for stability, but let the user make up their own mind.
Change-Id: Ie77d3be122478d5e674f92f8085930ae38ff2de1 Signed-off-by: Sean Rhodes sean@starlabs.systems Reviewed-on: https://review.coreboot.org/c/coreboot/+/84635 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/starlabs/starlite_adl/cmos.default M src/mainboard/starlabs/starlite_adl/cmos.layout M src/mainboard/starlabs/starlite_adl/spd/Makefile.mk A src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-5500.spd.hex A src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-6400.spd.hex R src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-7500.spd.hex M src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c 7 files changed, 74 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Maxim Polyakov: Looks good to me, approved
diff --git a/src/mainboard/starlabs/starlite_adl/cmos.default b/src/mainboard/starlabs/starlite_adl/cmos.default index 1290b4f..899d4c7 100644 --- a/src/mainboard/starlabs/starlite_adl/cmos.default +++ b/src/mainboard/starlabs/starlite_adl/cmos.default @@ -8,6 +8,7 @@ vtd=Enable power_profile=Balanced me_state=Disable +memory_speed=5500 # Devices wireless=Enable webcam=Enable diff --git a/src/mainboard/starlabs/starlite_adl/cmos.layout b/src/mainboard/starlabs/starlite_adl/cmos.layout index 3ee4644..b6dc5e4 100644 --- a/src/mainboard/starlabs/starlite_adl/cmos.layout +++ b/src/mainboard/starlabs/starlite_adl/cmos.layout @@ -24,6 +24,7 @@ 416 2 e 5 power_profile 424 1 e 4 me_state 432 4 h 0 me_state_counter +440 2 e 8 memory_speed
# coreboot config options: Devices 504 1 e 1 wireless @@ -78,6 +79,10 @@ 7 1 0.5C 7 2 0.2C
+8 0 5500MT/s +8 1 6400MT/s +8 2 7500MT/s + # ----------------------------------------------------------------- checksums
diff --git a/src/mainboard/starlabs/starlite_adl/spd/Makefile.mk b/src/mainboard/starlabs/starlite_adl/spd/Makefile.mk index 047e576..7c50cd7 100644 --- a/src/mainboard/starlabs/starlite_adl/spd/Makefile.mk +++ b/src/mainboard/starlabs/starlite_adl/spd/Makefile.mk @@ -1,3 +1,5 @@ ## SPDX-License-Identifier: GPL-2.0-only
-SPD_SOURCES = mt62f2g64d8 +SPD_SOURCES = mt62f2g64d8-5500 +SPD_SOURCES += mt62f2g64d8-6400 +SPD_SOURCES += mt62f2g64d8-7500 diff --git a/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-5500.spd.hex b/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-5500.spd.hex new file mode 100644 index 0000000..5236064 --- /dev/null +++ b/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-5500.spd.hex @@ -0,0 +1,32 @@ +23 10 15 0E 16 22 F9 08 00 00 00 00 0A 01 00 00 +00 00 0C 00 00 00 00 00 AF 00 90 A8 90 C0 08 60 +04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 CE 00 D3 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-6400.spd.hex b/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-6400.spd.hex new file mode 100644 index 0000000..d1d4ccf --- /dev/null +++ b/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-6400.spd.hex @@ -0,0 +1,32 @@ +23 10 15 0E 16 22 F9 08 00 00 00 00 0A 01 00 00 +00 00 0A 00 00 00 00 00 AA 00 90 A8 90 C0 08 60 +04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8.spd.hex b/src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-7500.spd.hex similarity index 100% rename from src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8.spd.hex rename to src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-7500.spd.hex diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c index cd41cc4..b346241 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c @@ -93,7 +93,7 @@
const struct mem_spd lpddr5_spd_info = { .topo = MEM_TOPO_MEMORY_DOWN, - .cbfs_index = 0, + .cbfs_index = get_uint_option("memory_speed", 0), };
memcfg_init(mupd, &mem_config, &lpddr5_spd_info, half_populated);
-
Sean Rhodes (Code Review)