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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56461 )
Change subject: [TESTONLY]prodive/hermes: Try to run UART2 in ACPI mode
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Patch Set 2:
(1 comment)
File src/soc/intel/common/block/uart/uart.c:
https://review.coreboot.org/c/coreboot/+/56461/comment/8d30c383_e73f6230
PS2, Line 120: 0xfe020000
0xFE032000 […]
Apparently, FSP does this so that the SerialIO resources don't change across boots, because some OSes cache resource info. I think Windows reconfigures devices if resources change, which slows down boot significantly. Oh, and these BARs fall within the "PCH preserved range" mentioned elsewhere in soc/intel code.
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