Change in coreboot[master]: mb/asus/.../p3b-f: Enable flashrom in ramstage final

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Keith Hui (Code Review)

10 May 2020 10 May '20

10:29 p.m.

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

mb/asus/.../p3b-f: Enable flashrom in ramstage final

p3b-f needs a special (but known) trick for flashrom to work. as that trick no longer works after introducing ACPI support, add a mainboard finalize hook to do it at the end of ramstage.

Ideally this would be controlled by an nvram option.

TEST=flashrom detects flash chip without further user action.

Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Signed-off-by: Keith Hui buurin@gmail.com --- M src/mainboard/asus/p2b/Makefile.inc A src/mainboard/asus/p2b/variants/p3b-f/mainboard.c 2 files changed, 30 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/41224/1

diff --git a/src/mainboard/asus/p2b/Makefile.inc b/src/mainboard/asus/p2b/Makefile.inc index eb48944..5b936cb 100644 --- a/src/mainboard/asus/p2b/Makefile.inc +++ b/src/mainboard/asus/p2b/Makefile.inc @@ -1,5 +1,6 @@ bootblock-y += bootblock.c romstage-$(CONFIG_BOARD_ASUS_P3B_F) += variants/$(VARIANT_DIR)/romstage.c +ramstage-$(CONFIG_BOARD_ASUS_P3B_F) += variants/$(VARIANT_DIR)/mainboard.c

ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += variants/$(VARIANT_DIR)/irq_tables.c ramstage-$(CONFIG_GENERATE_MP_TABLE) += variants/$(VARIANT_DIR)/mptable.c diff --git a/src/mainboard/asus/p2b/variants/p3b-f/mainboard.c b/src/mainboard/asus/p2b/variants/p3b-f/mainboard.c new file mode 100644 index 0000000..f2d322f --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p3b-f/mainboard.c @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#include <device/smbus_host.h> +#include <device/pci_ops.h> +#include <console/console.h> +#include <southbridge/intel/i82371eb/i82371eb.h> + +/** + * Finalize mainboard. For p3b-f, attempt to enable flashrom. + * @param chip_info Ignored + */ +static void mainboard_final(void *chip_info) +{ + const pci_devfn_t px43 = PCI_DEV(0, 4, 3); + int r; + uintptr_t base; + base = pci_s_read_config32(px43, SMBBA) & 0xfff0; + + printk(BIOS_INFO, "Flashrom enable"); + r = do_smbus_write_byte(base, 0x48, 0x80, 0x80); + if (r < 0) + printk(BIOS_INFO," faile"); + printk(BIOS_INFO,"d\n"); +} + +struct chip_operations mainboard_ops = { + .final = mainboard_final +};

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build bot (Jenkins) (Code Review)

10 May 10 May

10:33 p.m.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(2 comments)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: printk(BIOS_INFO," faile"); space required after that ',' (ctx:VxV)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 24: printk(BIOS_INFO,"d\n"); space required after that ',' (ctx:VxV)

Angel Pons (Code Review)

11 May 11 May

2:19 a.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 22: if (r < 0) Is it needed to split the strings like that? I would use full statements instead, so that the error message can use BIOS_ERR or BIOS_NOTICE instead of BIOS_INFO

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Mon, 11 May 2020 08:19:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Paul Menzel (Code Review)

5:11 a.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(4 comments)

Why can’t flashrom run the enable routine itself, that means, why is it needed in firmware?

https://review.coreboot.org/c/coreboot/+/41224/1//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/41224/1//COMMIT_MSG@9 PS1, Line 9: as As

https://review.coreboot.org/c/coreboot/+/41224/1//COMMIT_MSG@10 PS1, Line 10: trick no longer works after introducing ACPI support, add a mainboard Why doesn’t it work anymore with ACPI support?

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: faile failed

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: printk(BIOS_INFO," faile"); The failed message should be error or even warning level.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Mon, 11 May 2020 11:11:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Patrick Georgi (Code Review)

12 May 12 May

1:38 p.m.

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 3: the "is part of" line has been dropped.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 12 May 2020 19:38:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Keith Hui (Code Review)

3:03 p.m.

Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(8 comments)

https://review.coreboot.org/c/coreboot/+/41224/1//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/41224/1//COMMIT_MSG@9 PS1, Line 9: as

...

As

Ack

https://review.coreboot.org/c/coreboot/+/41224/1//COMMIT_MSG@10 PS1, Line 10: trick no longer works after introducing ACPI support, add a mainboard

...

Why doesn’t it work anymore with ACPI support?

I still haven't figured it out. With ACPI patch compiled in, the i2cset command simply says write failed. I have to disable ACPI in kernel to succeed.

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 3:

...

the "is part of" line has been dropped.

Ack

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 22: if (r < 0)

...

Is it needed to split the strings like that? I would use full statements instead, so that the error […]

I intentionally break up the message like this to conserve flash space, rather than duplicating the bulk of it.

In the flash the message is saved as "Flashrom enable| faile|d", here with terminal zeros replaced by '|' for visualization. The middle part is shown only on failure. On success the console shows "Flashrom enabled", which doubles as a breadcrumb.

My preferred alternative would be to only print a BIOS_WARN message if flashrom enable is attempted and failed, and stay silent otherwise. At least decide the message level during runtime based on result of the attempt. With a workaround available, failing here is not a big deal.

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: printk(BIOS_INFO," faile");

...

The failed message should be error or even warning level.

See above

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: printk(BIOS_INFO," faile");

...

space required after that ',' (ctx:VxV)

Ack

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: faile

...

failed

Ditto

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 24: printk(BIOS_INFO,"d\n");

...

space required after that ',' (ctx:VxV)

Ack

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 12 May 2020 21:03:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: build bot (Jenkins) no-reply@coreboot.org Comment-In-Reply-To: Patrick Georgi pgeorgi@google.com Comment-In-Reply-To: Paul Menzel paulepanter@users.sourceforge.net Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Paul Menzel (Code Review)

3:35 p.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: faile

...

Ditto

That is for the typo.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 12 May 2020 21:35:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel paulepanter@users.sourceforge.net Comment-In-Reply-To: Keith Hui buurin@gmail.com Gerrit-MessageType: comment

Keith Hui (Code Review)

4:11 p.m.

Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: faile

...

That is for the typo.

This is an intentional space saving measure. See my response to Angel.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 12 May 2020 22:11:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel paulepanter@users.sourceforge.net Comment-In-Reply-To: Keith Hui buurin@gmail.com Gerrit-MessageType: comment

Keith Hui (Code Review)

8:06 p.m.

Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

I've coded a board enable for flashrom:

https://review.coreboot.org/c/flashrom/+/41354

When that gets merged, this one can be abandoned.

This patch is helping me bisect an issue where the SeaBIOS hangs when relocating itself.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 13 May 2020 02:06:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

Paul Menzel (Code Review)

13 May 13 May

3:08 a.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 23: faile

...

This is an intentional space saving measure. See my response to Angel.

You are right, I only saw it now. Sorry for being inattentive.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 13 May 2020 09:08:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel paulepanter@users.sourceforge.net Comment-In-Reply-To: Keith Hui buurin@gmail.com Gerrit-MessageType: comment

Paul Menzel (Code Review)

3:10 a.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

...

Patch Set 1:

I've coded a board enable for flashrom:

https://review.coreboot.org/c/flashrom/+/41354

When that gets merged, this one can be abandoned.

This patch is helping me bisect an issue where the SeaBIOS hangs when relocating itself.

For perfection, it would still might sense to support older flashrom versions, and hiding this code here behind a CMOS option. But I believe, it’s not necessary for the small user base.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684f8f560a714cbcaf56033202a841e6801ad999 Gerrit-Change-Number: 41224 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 13 May 2020 09:10:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

Paul Menzel (Code Review)

3:11 a.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

...

Patch Set 1:

...
Patch Set 1:

I've coded a board enable for flashrom:

https://review.coreboot.org/c/flashrom/+/41354

When that gets merged, this one can be abandoned.

This patch is helping me bisect an issue where the SeaBIOS hangs when relocating itself.

For perfection, it would still might sense to support older flashrom versions, and hiding this code here behind a CMOS option. But I believe, it’s not necessary for the small user base.

(And that is what you wrote in the commit message. Sorry for missing that.)

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Krystian Hebel (Code Review)

9:22 a.m.

Krystian Hebel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... File src/mainboard/asus/p2b/variants/p3b-f/mainboard.c:

https://review.coreboot.org/c/coreboot/+/41224/1/src/mainboard/asus/p2b/vari... PS1, Line 22: if (r < 0)

...

I intentionally break up the message like this to conserve flash space, rather than duplicating the […]

It may be a good idea to add a comment explaining this in the file. I have a feeling someone might try to "fix" this at some point.

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Keith Hui (Code Review)

19 May 19 May

1:05 p.m.

Keith Hui has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/41224 )

Change subject: mb/asus/.../p3b-f: Enable flashrom in ramstage final ......................................................................

Abandoned

Board enable landed at flashrom. This was fun while it lasted.

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13 comments

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participants (6)

Angel Pons (Code Review)
build bot (Jenkins) (Code Review)
Keith Hui (Code Review)
Krystian Hebel (Code Review)
Patrick Georgi (Code Review)
Paul Menzel (Code Review)