Change in coreboot[master]: demo: combo

[Bao Zheng (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held.
Hello Zheng Bao,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/63292

to review the following change.

Change subject: demo: combo
......................................................................

demo: combo

Change-Id: I1f51fab065ad566be4d01b78d37455b0e61bd284
Signed-off-by: Zheng Bao 
---
M src/soc/amd/cezanne/Makefile.inc
A src/soc/amd/cezanne/fw_rn.cfg
2 files changed, 43 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/63292/1

diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index de045ac..0b09fe5 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -245,6 +245,9 @@
    	$(OPT_APOB_NV_BASE) \
    	$(OPT_VERSTAGE_FILE) \
    	$(OPT_VERSTAGE_SIG_FILE) \
+		--config "src/soc/amd/cezanne/fw.cfg" \
+		--combo-config1 "src/soc/amd/cezanne/fw_rn.cfg" \
+		--recovery-ab \
    	--location $(shell printf "%#x" $(CEZANNE_FWM_POSITION)) \
    	--multilevel \
    	--output $@
diff --git a/src/soc/amd/cezanne/fw_rn.cfg b/src/soc/amd/cezanne/fw_rn.cfg
new file mode 100644
index 0000000..b7031ca
--- /dev/null
+++ b/src/soc/amd/cezanne/fw_rn.cfg
@@ -0,0 +1,40 @@
+# PSP fw config file
+
+FIRMWARE_LOCATION      3rdparty/amd_blobs/renoir/PSP
+SOC_NAME               Renoir
+
+# type                    file
+# PSP
+AMD_PUBKEY_FILE         RenoirRoot.tkn
+PSPBTLDR_FILE           PspBootLoader_prod_RN.sbin
+PSPSECUREOS_FILE        psp_os_combined_prod_RN.sbin
+PSPRCVR_FILE            PspRecoveryBootLoader_prod_RN.sbin
+PSP_SMUFW1_SUB0_FILE    SmuFirmwareRN.csbin
+PSPSECUREDEBUG_FILE     RenoirSecureDebug_PublicKey.bin
+PSPTRUSTLETS_FILE       dr_ftpm_prod_RN.csbin
+PSP_SMUFW2_SUB0_FILE    SmuFirmware2RN.csbin
+PSP_SEC_DEBUG_FILE      secure_unlock_RN.sbin
+PSP_HW_IPCFG_FILE       HwIpCfg_RN_A0.sbin
+PSP_IKEK_FILE           PspIkekRN.bin
+#PSP_SECURE_EMPTY_FILE   SecureEmptyToken.bin
+PSP_SECG0_FILE          security_policy_RN_FP6_AM4_PspBl.sbin
+PSP_MP2FW0_FILE         MP2FWRN.sbin
+AMD_DRIVER_ENTRIES      drv_sys_prod_RN.sbin
+#PSP_KVM_ENGINE_DUMMY_FILE TypeId0x29_KvmEngineDummy.csbin
+PSP_S0I3_FILE           dr_agesa_prod_RN.sbin
+PSP_ABL0_FILE           AgesaBootloader_U_prod_RN_LPDDR4.csbin
+VBIOS_BTLOADER_FILE     VbiosBootLoader_prod.sbin
+SECURE_POLICY_L1_FILE   security_policy_RN_FP6_AM4_tOS.sbin
+UNIFIEDUSB_FILE         Unified_USB_RN.sbin
+DRTMTA_FILE             dr_drtm_out_prod.sbin
+KEYDBBL_FILE            prod_kdb_bl.bin
+KEYDB_TOS_FILE          prod_kdb_tos.sbin
+DMCUERAMDCN21_FILE      dmcu_eram_Dcn21.sbin
+DMCUINTVECTORSDCN21_FILE  dmcu_intvectors_Dcn21.sbin
+
+# BDT
+PSP_PMUI_FILE_SUB0_INS1  Appb_RN_1D_Lpddr4_Imem.csbin
+PSP_PMUD_FILE_SUB0_INS1  Appb_RN_1D_Lpddr4_Dmem.csbin
+PSP_PMUI_FILE_SUB0_INS4  Appb_RN_2D_Lpddr4_Imem.csbin
+PSP_PMUD_FILE_SUB0_INS4  Appb_RN_2D_Lpddr4_Dmem.csbin
+PSP_MP2CFG_FILE MP2FWConfig.sbin