Change in coreboot[master]: mainboard/intel/coffeelake_rvp: Fix I2C4, I2C5 and UART2 CFL-H specif...

[Kin Wai Ng (Code Review)]

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,

I'd like you to do a code review. Please visit

https://review.coreboot.org/25234

to review the following change.

Change subject: mainboard/intel/coffeelake_rvp: Fix I2C4, I2C5 and UART2 CFL-H specific device
......................................................................

mainboard/intel/coffeelake_rvp: Fix I2C4, I2C5 and UART2 CFL-H specific device

1. I2C4, I2C5 not found in CFL-H.
2. Add UART2 device

Change-Id: Ic00782f2a186b4f1fff169044e25246e1e13248b
Signed-off-by: Ng Kin Wai 
---
M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
M src/soc/intel/coffeelake/chip.c
M src/soc/intel/coffeelake/i2c.c
M src/soc/intel/coffeelake/include/soc/pci_devs.h
4 files changed, 3 insertions(+), 21 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/25234/1

diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
index 0a18432..fe6736e 100755
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
@@ -117,9 +117,7 @@
    	device pci 16.4 off end # Management Engine Interface 3
    	device pci 16.5 off end # Management Engine Interface 4
    	device pci 17.0 off  end # SATA
-		device pci 19.0 on  end # I2C #4
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on  end # UART #2
+		device pci 19.0 on  end # UART #2
    	device pci 1a.0 on  end # eMMC
    	device pci 1c.0 on  end # PCI Express Port 1 x4 SLOT1
    	device pci 1c.4 on  end # PCI Express Port 5 x1 SLOT2/LAN
diff --git a/src/soc/intel/coffeelake/chip.c b/src/soc/intel/coffeelake/chip.c
old mode 100644
new mode 100755
index cf6a334..9819ee1
--- a/src/soc/intel/coffeelake/chip.c
+++ b/src/soc/intel/coffeelake/chip.c
@@ -51,8 +51,6 @@
    case PCH_DEVFN_CSE_3:	return "CSE3";
    case PCH_DEVFN_SATA:	return "SATA";
    case PCH_DEVFN_UART2:	return "UAR2";
-	case PCH_DEVFN_I2C4:	return "I2C4";
-	case PCH_DEVFN_I2C5:	return "I2C5";
    case PCH_DEVFN_PCIE1:	return "RP01";
    case PCH_DEVFN_PCIE2:	return "RP02";
    case PCH_DEVFN_PCIE3:	return "RP03";
@@ -104,8 +102,6 @@
    	PCH_DEVFN_I2C1,
    	PCH_DEVFN_I2C2,
    	PCH_DEVFN_I2C3,
-		PCH_DEVFN_I2C4,
-		PCH_DEVFN_I2C5,
    	PCH_DEVFN_GSPI0,
    	PCH_DEVFN_GSPI1,
    	PCH_DEVFN_GSPI2,
diff --git a/src/soc/intel/coffeelake/i2c.c b/src/soc/intel/coffeelake/i2c.c
old mode 100644
new mode 100755
index df46ef3..8536fc0
--- a/src/soc/intel/coffeelake/i2c.c
+++ b/src/soc/intel/coffeelake/i2c.c
@@ -53,10 +53,6 @@
    	return 2;
    case PCH_DEVFN_I2C3:
    	return 3;
-	case PCH_DEVFN_I2C4:
-		return 4;
-	case PCH_DEVFN_I2C5:
-		return 5;
    }
    return -1;
 }
@@ -72,10 +68,6 @@
    	return PCH_DEVFN_I2C2;
    case 3:
    	return PCH_DEVFN_I2C3;
-	case 4:
-		return PCH_DEVFN_I2C4;
-	case 5:
-		return PCH_DEVFN_I2C5;
    }
    return -1;
 }
diff --git a/src/soc/intel/coffeelake/include/soc/pci_devs.h b/src/soc/intel/coffeelake/include/soc/pci_devs.h
old mode 100644
new mode 100755
index d98f81f..6b66cbc
--- a/src/soc/intel/coffeelake/include/soc/pci_devs.h
+++ b/src/soc/intel/coffeelake/include/soc/pci_devs.h
@@ -100,12 +100,8 @@
 #define  PCH_DEV_SATA		_PCH_DEV(SATA, 0)

#define PCH_DEV_SLOT_SIO2	0x19
-#define  PCH_DEVFN_I2C4		_PCH_DEVFN(SIO2, 0)
-#define  PCH_DEVFN_I2C5		_PCH_DEVFN(SIO2, 1)
-#define  PCH_DEVFN_UART2	_PCH_DEVFN(SIO2, 2)
-#define  PCH_DEV_I2C4		_PCH_DEV(SIO2, 0)
-#define  PCH_DEV_I2C5		_PCH_DEV(SIO2, 1)
-#define  PCH_DEV_UART2		_PCH_DEV(SIO2, 2)
+#define  PCH_DEVFN_UART2	_PCH_DEVFN(SIO2, 0)
+#define  PCH_DEV_UART2		_PCH_DEV(SIO2, 0)

#define PCH_DEV_SLOT_STORAGE	0x1A
 #define  PCH_DEVFN_EMMC		_PCH_DEVFN(STORAGE, 0)