Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34228 )
Change subject: intel/i945: Fix udelay() prototypes ......................................................................
intel/i945: Fix udelay() prototypes
Change-Id: Ia157c6417bdd9c4ffbdf07683c51d0680e9356c9 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/getac/p470/romstage.c M src/mainboard/kontron/986lcd-m/romstage.c M src/mainboard/lenovo/t60/romstage.c M src/mainboard/lenovo/x60/romstage.c M src/mainboard/lenovo/z61t/romstage.c M src/mainboard/roda/rk886ex/romstage.c M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 8 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/34228/1
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index aaa3422..d14b1c8 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -17,6 +17,7 @@ #include <stdint.h> #include <arch/io.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 85a82c5..b51e4b4 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -17,6 +17,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <console/console.h> #include <cpu/intel/romstage.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 820cd52..cfe2d23 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -19,6 +19,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index b66ef66..fc0c678 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -19,6 +19,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c index 716be16..c31301e 100644 --- a/src/mainboard/lenovo/z61t/romstage.c +++ b/src/mainboard/lenovo/z61t/romstage.c @@ -19,6 +19,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 2bdad27..efd739c 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 281e7b2..c42c34c 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -16,6 +16,7 @@
#include <console/console.h> #include <cpu/x86/cache.h> +#include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <cf9_reset.h> diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h index e9e66d1..d417169 100644 --- a/src/northbridge/intel/i945/raminit.h +++ b/src/northbridge/intel/i945/raminit.h @@ -68,5 +68,4 @@ void receive_enable_adjust(struct sys_info *sysinfo); void sdram_initialize(int boot_path, const u8 *sdram_addresses); int fixup_i945_errata(void); -void udelay(u32 us); #endif /* RAMINIT_H */
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34228 )
Change subject: intel/i945: Fix udelay() prototypes ......................................................................
Patch Set 1: Code-Review+2
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34228 )
Change subject: intel/i945: Fix udelay() prototypes ......................................................................
intel/i945: Fix udelay() prototypes
Change-Id: Ia157c6417bdd9c4ffbdf07683c51d0680e9356c9 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34228 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/mainboard/getac/p470/romstage.c M src/mainboard/kontron/986lcd-m/romstage.c M src/mainboard/lenovo/t60/romstage.c M src/mainboard/lenovo/x60/romstage.c M src/mainboard/lenovo/z61t/romstage.c M src/mainboard/roda/rk886ex/romstage.c M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 8 files changed, 7 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index aaa3422..d14b1c8 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -17,6 +17,7 @@ #include <stdint.h> #include <arch/io.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 85a82c5..b51e4b4 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -17,6 +17,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <console/console.h> #include <cpu/intel/romstage.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 820cd52..cfe2d23 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -19,6 +19,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index b66ef66..fc0c678 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -19,6 +19,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c index 716be16..c31301e 100644 --- a/src/mainboard/lenovo/z61t/romstage.c +++ b/src/mainboard/lenovo/z61t/romstage.c @@ -19,6 +19,7 @@
#include <stdint.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 2bdad27..efd739c 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> #include <cf9_reset.h> +#include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 281e7b2..c42c34c 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -16,6 +16,7 @@
#include <console/console.h> #include <cpu/x86/cache.h> +#include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <cf9_reset.h> diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h index e9e66d1..d417169 100644 --- a/src/northbridge/intel/i945/raminit.h +++ b/src/northbridge/intel/i945/raminit.h @@ -68,5 +68,4 @@ void receive_enable_adjust(struct sys_info *sysinfo); void sdram_initialize(int boot_path, const u8 *sdram_addresses); int fixup_i945_errata(void); -void udelay(u32 us); #endif /* RAMINIT_H */
-
HAOUAS Elyes (Code Review) -
Kyösti Mälkki (Code Review)
-
Martin Roth (Code Review)