[S] Change in coreboot[master]: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74831 )

Change subject: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise
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soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise

This patch makes CSE sync in romstage default enabled unless ramstage
config (SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) chooses to override it.

TEST=Able to build google/marasov with this change where CSE sync is
performed early inside romstage.

Signed-off-by: Subrata Banik 
Change-Id: I3f5017fbcf917201eaf8233089050bd31c3d1917

Change-Id: If049f164395ee3c7b441877a491304165dc7c72c
Signed-off-by: Subrata Banik 
---
M src/soc/intel/common/block/cse/Kconfig
1 file changed, 20 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/74831/1

diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index 1eb3eff..26c623f 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -248,7 +248,7 @@

config SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE
    bool
-	default y
+	default !SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE
    depends on SOC_INTEL_CSE_LITE_SKU && !SOC_INTEL_CSE_LITE_COMPRESS_ME_RW
    help
     Use default flow of CSE FW Update in romstage when uncompressed ME_RW blobs are used.