Change in coreboot[master]: mb/google/zork: modify ELAN TS i2c IRQ to LEVEL active for dirinboz

[Martin Roth (Code Review)]

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50416 )

Change subject: mb/google/zork: modify ELAN TS i2c IRQ to LEVEL active for dirinboz
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mb/google/zork: modify ELAN TS i2c IRQ to LEVEL active for dirinboz

EDGE IRQ from TS might be invalid to HOST, configure IRQs
as level triggered to prevent TS lost.

BUG=b:179594439
BRANCH=zork
TEST=1. emerge-zork coreboot chromeos-bootimage
     2. power on, suspend DUT to check TS is functional

Change-Id: Ibbbc73b37932ba1359ffe6f572a15564bb341025
Signed-off-by: Kevin Chiu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50416
Reviewed-by: Kangheui Won 
Reviewed-by: Sam McNally 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/zork/variants/dirinboz/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Kangheui Won: Looks good to me, approved
  Sam McNally: Looks good to me, approved

diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
index 1bfea1d..283b1fc 100644
--- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
@@ -120,7 +120,7 @@
    		register "hid" = ""ELAN0001""
    		register "desc" = ""ELAN Touchscreen""
    		register "probed" = "1"
-			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
+			register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_12)"
    		register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_32)"
    		register "enable_delay_ms" = "1"
    		register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)"