[S] Change in coreboot[main]: soc/intel/meteorlake: Enable SOC config override during boot

[Cliff Huang (Code Review)]

Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82174?usp=email )

Change subject: soc/intel/meteorlake: Enable SOC config override during boot
......................................................................

soc/intel/meteorlake: Enable SOC config override during boot

A copy of config is created from the static devicetree config so that
its fields can be updated during boot. This modified config is then
passed to functions to fill the UPD params. This is needed for the
UPD parameters whose values are not known until reading CBI fw_config.
The examples are Intel Touch host controller(THC), WIFI, etc.

Signed-off-by: Cliff Huang 
Change-Id: I1621d38455895a5acc9e9b55d1fc8e4911bc5b1a
---
M src/soc/intel/meteorlake/fsp_params.c
M src/soc/intel/meteorlake/romstage/fsp_params.c
2 files changed, 10 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/82174/1

diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index a02d4b9..4aa7d67 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -820,13 +820,15 @@
 /* UPD parameters to be initialized before SiliconInit */
 void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 {
-	struct soc_intel_meteorlake_config *config;
+	const struct soc_intel_meteorlake_config *const_config;
+	struct soc_intel_meteorlake_config config;
    FSP_S_CONFIG *s_cfg = &supd->FspsConfig;
    FSPS_ARCH_UPD *s_arch_cfg = &supd->FspsArchUpd;

-	config = config_of_soc();
+	const_config = config_of_soc();
+	memcpy(&config, const_config, sizeof(struct soc_intel_meteorlake_config));
    arch_silicon_init_params(s_arch_cfg);
-	soc_silicon_init_params(s_cfg, config);
+	soc_silicon_init_params(s_cfg, &config);
    mainboard_silicon_init_params(s_cfg);
 }

diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index caf57a3..6f63543 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -493,7 +493,8 @@

void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 {
-	const struct soc_intel_meteorlake_config *config;
+	const struct soc_intel_meteorlake_config *const_config;
+	struct soc_intel_meteorlake_config config;
    FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
    FSPM_ARCH_UPD *arch_upd = &mupd->FspmArchUpd;

@@ -513,9 +514,10 @@
    		m_cfg->SerialDebugMrcLevel = 0;
    	}
    }
-	config = config_of_soc();
+	const_config = config_of_soc();
+	memcpy(&config, const_config, sizeof(struct soc_intel_meteorlake_config));

-	soc_memory_init_params(m_cfg, config);
+	soc_memory_init_params(m_cfg, &config);

if (CONFIG(SOC_INTEL_METEORLAKE_SIGN_OF_LIFE))
    	fill_fspm_sign_of_life(m_cfg, arch_upd);