Change in coreboot[master]: soc/intel/apollolake/acpi: Replace Add(a,b) with ASL 2.0 syntax

[Felix Singer (Code Review)]

Attention is currently required from: Andrey Petrov, Patrick Rudolph.
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60504 )

Change subject: soc/intel/apollolake/acpi: Replace Add(a,b) with ASL 2.0 syntax
......................................................................

soc/intel/apollolake/acpi: Replace Add(a,b) with ASL 2.0 syntax

Replace `Add (a, b)` with `a + b`.

Change-Id: Id465558f054494d3273d5cd6077476d878d7c183
Signed-off-by: Felix Singer 
---
M src/soc/intel/apollolake/acpi/gpiolib.asl
M src/soc/intel/apollolake/acpi/northbridge.asl
2 files changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/60504/1

diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl
index e01d549..c579d14 100644
--- a/src/soc/intel/apollolake/acpi/gpiolib.asl
+++ b/src/soc/intel/apollolake/acpi/gpiolib.asl
@@ -31,7 +31,7 @@
    Method (GPC1, 0x1, Serialized)
    {
    	/* Arg0 - GPIO DW0 address */
-		Store (Add (Arg0, 0x4), Local0)
+		Store (Arg0 + 4, Local0)
    	OperationRegion (PDW1, SystemMemory, Local0, 4)
    	Field (PDW1, AnyAcc, NoLock, Preserve) {
    		TEMP, 32
@@ -44,7 +44,7 @@
    {
    	/* Arg0 - GPIO DW0 address */
    	/* Arg1 - Value for DW1 register */
-		Store (Add (Arg0, 0x4), Local0)
+		Store (Arg0 + 0x4, Local0)
    	OperationRegion (PDW1, SystemMemory, Local0, 4)
    	Field(PDW1, AnyAcc, NoLock, Preserve) {
    		TEMP,32
@@ -60,8 +60,8 @@
    	Store (0, Local1)
    	Or( Or (ShiftLeft (Arg0, 16), CONFIG_PCR_BASE_ADDRESS),
    				Local1, Local1)
-		Or( Add (PAD_CFG_BASE, Multiply (Arg1, Multiply (
-			GPIO_NUM_PAD_CFG_REGS, 4))), Local1, Local1)
+		Or(PAD_CFG_BASE + Multiply (Arg1, Multiply (
+			GPIO_NUM_PAD_CFG_REGS, 4)), Local1, Local1)
    	Return (Local1)
    }

diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
index 4f2acbb..ea9d5b4 100644
--- a/src/soc/intel/apollolake/acpi/northbridge.asl
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -109,7 +109,7 @@
    	/* Set 64bit MMIO resource base and length */
    	Store (A4GS, MLEN)
    	Store (A4GB, MMIN)
-		MMAX = Add (MMIN, MLEN) - 1
+		MMAX = MMIN + MLEN - 1
    }

Return (MCRS)