[XS] Change in coreboot[main]: soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly

[Kane Chen (Code Review)]

Attention is currently required from: Eran Mitrani, Eric Lai, Kane Chen, Kapil Porwal, Ravishankar Sarawadi, Tarun.

Hello Eran Mitrani, Eric Lai, Kapil Porwal, Ravishankar Sarawadi, Subrata Banik, Tarun, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/78252?usp=email

to look at the new patch set (#3).

Change subject: soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly
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soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly

The original code only reserves IOM mmio, but there is other asl
code that requires to program ioe p2sb mmio such as IOE PCIE clk request
control. See _SB.ECLK.CLKD in src/soc/intel/common/acpi/pcie_clk.asl

TEST=suspend_stress_test 50 cycle pass, type-c display OK on screebo

Change-Id: Ie55f7975277b390f776e44596c42e426ba9cd235
Signed-off-by: Kane Chen 
---
M src/soc/intel/meteorlake/p2sb.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/78252/3