Change in coreboot[master]: soc/intel/{common,alderlake}: Define Alderlake Platform for ADL-P/M

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55252 )

Change subject: soc/intel/{common,alderlake}: Define Alderlake Platform for ADL-P/M
......................................................................

soc/intel/{common,alderlake}: Define Alderlake Platform for ADL-P/M

The patch defines "Alderlake Platform" for Alderlake-P and Alderlake-M
silicon variants. Hence, rename all ADL-P SI CPUID macros as Alderlake
A0/B0/C0.

TEST=Verify boot on Brya. After change, relevent coreboot logs appear as
below:

CPU: ID 906a1, Alderlake Platform, ucode: 00000119
CPU: AES supported, TXT supported, VT supported
MCH: device id 4601 (rev 03) is Alderlake-P
PCH: device id 5181 (rev 00) is Alderlake-P SKU
IGD: device id 46b0 (rev 04) is Alderlake P GT2

Signed-off-by: Sridhar Siricilla 
Change-Id: Ia06d2b62d4194edd4e104d49b340ac23305a4c15
---
M src/soc/intel/alderlake/bootblock/report_platform.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/include/intelblocks/mp_init.h
3 files changed, 9 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/55252/1

diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 15391ab..d0f82b7 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -22,9 +22,9 @@
    u32 cpuid;
    const char *name;
 } cpu_table[] = {
-	{ CPUID_ALDERLAKE_P_A0, "Alderlake-P A0" },
-	{ CPUID_ALDERLAKE_P_B0, "Alderlake-P B0" },
-	{ CPUID_ALDERLAKE_M_A0, "Alderlake-M A0" },
+	{ CPUID_ALDERLAKE_A0, "Alderlake Platform" },
+	{ CPUID_ALDERLAKE_B0, "Alderlake Platform" },
+	{ CPUID_ALDERLAKE_C0, "Alderlake Platform" },
 };

static struct {
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 7e8c199..9f55f46 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -67,9 +67,9 @@
    { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0 },
    { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0 },
    { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0 },
-	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_P_A0 },
-	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_P_B0 },
-	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_M_A0 },
+	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0 },
+	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_B0 },
+	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_C0 },
    { 0, 0 },
 };

diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index 3d8290f..23a2037 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -45,9 +45,9 @@
 #define CPUID_ELKHARTLAKE_A0	0x90660
 #define CPUID_ELKHARTLAKE_B0	0x90661
 #define CPUID_ALDERLAKE_S_A0	0x90670
-#define CPUID_ALDERLAKE_P_A0	0x906a0
-#define CPUID_ALDERLAKE_P_B0	0x906a2
-#define CPUID_ALDERLAKE_M_A0	0x906a1
+#define CPUID_ALDERLAKE_A0	0x906a0
+#define CPUID_ALDERLAKE_B0	0x906a1
+#define CPUID_ALDERLAKE_C0	0x906a2
 /*
  * MP Init callback function to Find CPU Topology. This function is common
  * among all SOCs and thus its in Common CPU block.