Change in coreboot[master]: cpu/amd/family_10h-family_15h/exit_car.S: Add empty CAR teardown

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62085 )

Change subject: cpu/amd/family_10h-family_15h/exit_car.S: Add empty CAR teardown
......................................................................

cpu/amd/family_10h-family_15h/exit_car.S: Add empty CAR teardown

This is the fist buildable commit wit hthe coreboot-sdk
2021-09-23_b0d87f753c. From this point subsequent commits will bring
new changes and implement missing functionalities.

Signed-off-by: Michał Żygowski 
Change-Id: I438b01ab89c5a4c8b66cd39cb52911636af2d72b
---
M src/cpu/amd/family_10h-family_15h/Makefile.inc
A src/cpu/amd/family_10h-family_15h/exit_car.S
2 files changed, 12 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/62085/1

diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc
index 8088cc4..a4402ff 100644
--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc
+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc
@@ -3,6 +3,8 @@

romstage-y += romstage.c

+postcar-y += exit_car.S
+
 ifeq ($(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS),y)
 # Microcode for Family 10h, 11h, 12h, and 14h
 cpu_microcode_bins += 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin
diff --git a/src/cpu/amd/family_10h-family_15h/exit_car.S b/src/cpu/amd/family_10h-family_15h/exit_car.S
new file mode 100644
index 0000000..af843dc
--- /dev/null
+++ b/src/cpu/amd/family_10h-family_15h/exit_car.S
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/x86/cache.h>
+
+.code32
+.global chipset_teardown_car
+
+chipset_teardown_car:
+	pop	%esp
+	jmp	*%esp