Change in coreboot[master]: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
This change adds Platform-Wide _OSC capabilities for native USB4 support. There is Engineering Change Request (ECR) with _OSC addition for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 as native USB4 support. The OS sets this bit to indicate support for an OSPM-native USB4 Connection Manager which handles USB4 connection events and link management. The OS use the _OSC mechanism and the bit defined in this ECR to obtain configuration and connection management capabilities of USB4 connections. This change also fixs the byte index for the DWord-addressable field CDW3 from the capabilities buffer.
BUG=b:140645231 TEST=Check Type C device all ports connection/enumeration with SW CM.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I1b561ea5a0a6b440cca3152cc150f31abf7766ad --- M src/soc/intel/tigerlake/acpi/tcss.asl 1 file changed, 39 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/42821/1
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index 3f51ecc..7434a54 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -139,29 +139,46 @@
Method (_OSC, 4, Serialized) { - /* - * Operating System Capabilities for USB4 - * Arg0: UUID = {23A0D13A-26AB-486C-9C5F-0FFA525A575A} - * Arg1: Revision ID = 1 - * Arg2: Count of entries (DWORD) in Arg3 (Integer): 3 - * Arg3: DWORD capabilities buffer: - * First DWORD: The standard definition bits are used to return errors. - * Second DWORD: OSPM support field for USB4, bits [31:0] reserved. - * Third DWORD: OSPM control field for USB4. - * bit 0: USB tunneling - * bit 1: DisplayPort tunneling - * bit 2: PCIe tunneling - * bit 3: Inter-domain USB4 internet protocol - * bit 31:4: reserved - * Return: The platform acknowledges the capabilities buffer by returning - * a buffer of DWORD of the same length. Masked/Cleared bits in the - * control field indicate that the platform does not permit OSPM - * control of the respectively capabilities or features. - */ - Name (CTRL, 0) /* Control field value */ CreateDWordField (Arg3, 0, CDW1) - If (Arg0 == ToUUID("23A0D13A-26AB-486C-9C5F-0FFA525A575A")) { - CreateDWordField (Arg3, 2, CDW3) + If (Arg0 == ToUUID("0811B06E-4A27-44F9-8D60-3CBBC22E7B48")) { + /* Platform-Wide _OSC Capabilities + * Arg0: UUID = {0811B06E-4A27-44F9-8D60-3CBBC22E7B48} + * Arg1: Revision ID = 1 + * Arg2: Count of entries (DWORD) in Arge3 (Integer): 3 + * Arg3: DWORD capabilities buffer: + * First DWORD: The standard definition bits are used to return errors. + * Second DWORD: See ACPI specification Platform-Wide _OSC Capabilities + * DWORD2 table for Bits 0-17. Bit 18 is newly defined as native USB4 + * support. The OS sets this bit to indicate support for an OSPM-native + * USB4 Connection Manager which handles USB4 connection events and + * link management. + */ + If (Arg1 != REVISION) { + CDW1 |= UNRECOGNIZED_REVISION + } + Return (Arg3) + } ElseIf (Arg0 == ToUUID("23A0D13A-26AB-486C-9C5F-0FFA525A575A")) { + /* + * Operating System Capabilities for USB4 + * Arg0: UUID = {23A0D13A-26AB-486C-9C5F-0FFA525A575A} + * Arg1: Revision ID = 1 + * Arg2: Count of entries (DWORD) in Arg3 (Integer): 3 + * Arg3: DWORD capabilities buffer: + * First DWORD: The standard definition bits are used to return errors. + * Second DWORD: OSPM support field for USB4, bits [31:0] reserved. + * Third DWORD: OSPM control field for USB4. + * bit 0: USB tunneling + * bit 1: DisplayPort tunneling + * bit 2: PCIe tunneling + * bit 3: Inter-domain USB4 internet protocol + * bit 31:4: reserved + * Return: The platform acknowledges the capabilities buffer by + * returning a buffer of DWORD of the same length. Masked/Cleared bits + * in the control field indicate that the platform does not permit OSPM + * control of the respectively capabilities or features. + */ + Name (CTRL, 0) /* Control field value */ + CreateDWordField (Arg3, 8, CDW3) CTRL = CDW3
If (Arg1 != REVISION_ID) {
Hello build bot (Jenkins), Chiranjeevi Rapolu, Wonkyu Kim, Duncan Laurie, Tim Wawrzynczak, Shamile Khan, Patrick Rudolph, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42821
to look at the new patch set (#2).
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
This change adds Platform-Wide _OSC capabilities for native USB4 support. There is Engineering Change Request (ECR) with _OSC addition for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 as native USB4 support. The OS sets this bit to indicate support for an OSPM-native USB4 Connection Manager which handles USB4 connection events and link management. The OS use the _OSC mechanism and the bit defined in this ECR to obtain configuration and connection management capabilities of USB4 connections. This change also fixs the byte index for the DWord-addressable field CDW3 from the capabilities buffer.
BUG=b:140645231 TEST=Check Type C device all ports connection/enumeration with SW CM.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I1b561ea5a0a6b440cca3152cc150f31abf7766ad --- M src/soc/intel/tigerlake/acpi/tcss.asl 1 file changed, 39 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/42821/2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@11 PS2, Line 11: 6.2.11.1.13 I don't see a 6.2.11.1.13 in the latest published spec (https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf), could that possibly be 6.2.11.2, "Platform-wide OSPM Capabilities" ?
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@10 PS2, Line 10: There is Engineering Change Request (ECR) with _OSC addition : for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 : as native USB4 support. Is this ECR published anywhere?
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@16 PS2, Line 16: fixs fixes
https://review.coreboot.org/c/coreboot/+/42821/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/42821/2/src/soc/intel/tigerlake/acp... PS2, Line 147: Arge3 Arg3
Hello build bot (Jenkins), Chiranjeevi Rapolu, Wonkyu Kim, Tim Wawrzynczak, Duncan Laurie, Shamile Khan, Patrick Rudolph, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42821
to look at the new patch set (#3).
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
This change adds Platform-Wide _OSC capabilities for native USB4 support. There is Engineering Change Request (ECR) with _OSC addition for OSPM USB support. ACPI section 6.2.11.2 is modified with bit 18 as native USB4 support. The OS sets this bit to indicate support for an OSPM-native USB4 Connection Manager which handles USB4 connection events and link management. The OS use the _OSC mechanism and the bit defined in this ECR to obtain configuration and connection management capabilities of USB4 connections. This change also fixes the byte index for the DWord-addressable field CDW3 from the capabilities buffer.
BUG=b:140645231 TEST=Check Type C device all ports connection/enumeration with SW CM.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I1b561ea5a0a6b440cca3152cc150f31abf7766ad --- M src/soc/intel/tigerlake/acpi/tcss.asl 1 file changed, 39 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/42821/3
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 3:
(4 comments)
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@11 PS2, Line 11: 6.2.11.1.13
I don't see a 6.2.11.1.13 in the latest published spec (https://uefi. […]
Done
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@10 PS2, Line 10: There is Engineering Change Request (ECR) with _OSC addition : for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 : as native USB4 support.
Is this ECR published anywhere?
It seems not yet published.
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@16 PS2, Line 16: fixs
fixes
Done
https://review.coreboot.org/c/coreboot/+/42821/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/42821/2/src/soc/intel/tigerlake/acp... PS2, Line 147: Arge3
Arg3
Done
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@10 PS2, Line 10: There is Engineering Change Request (ECR) with _OSC addition : for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 : as native USB4 support.
It seems not yet published.
Do you have any information about when it may be published?
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@10 PS2, Line 10: There is Engineering Change Request (ECR) with _OSC addition : for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 : as native USB4 support.
Do you have any information about when it may be published?
Sorry, I don't know. I was informed this change is needed for kernel.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42821/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/3//COMMIT_MSG@16 PS3, Line 16: This change also fixes the byte index : for the DWord-addressable field CDW3 from the capabilities buffer Sorry about that, I think that was my fault; I misremembered how DWordField counted indexes.
https://review.coreboot.org/c/coreboot/+/42821/3/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/42821/3/src/soc/intel/tigerlake/acp... PS3, Line 180: Name (CTRL, 0) /* Control field value */ : CreateDWordField (Arg3, 8, CDW3) : CTRL = CDW3 : : If (Arg1 != REVISION_ID) { : CDW1 |= UNRECOGNIZED_REVISION : Return (Arg3) : } : CTRL |= USB_TUNNELING | DISPLAY_PORT_TUNNELING | PCIE_TUNNELING | : INTER_DOMAIN_USB4_INTERNET_PROTOCOL : CDW3 = CTRL Is there a reason you can't use Local0 instead of CTRL ? Local0 = CDW3, ... Local0 |= USB_TUNNELING ... CDW3 = Local0 etc.?
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42821/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/3//COMMIT_MSG@16 PS3, Line 16: This change also fixes the byte index : for the DWord-addressable field CDW3 from the capabilities buffer
Sorry about that, I think that was my fault; I misremembered how DWordField counted indexes.
np.
https://review.coreboot.org/c/coreboot/+/42821/3/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/42821/3/src/soc/intel/tigerlake/acp... PS3, Line 180: Name (CTRL, 0) /* Control field value */ : CreateDWordField (Arg3, 8, CDW3) : CTRL = CDW3 : : If (Arg1 != REVISION_ID) { : CDW1 |= UNRECOGNIZED_REVISION : Return (Arg3) : } : CTRL |= USB_TUNNELING | DISPLAY_PORT_TUNNELING | PCIE_TUNNELING | : INTER_DOMAIN_USB4_INTERNET_PROTOCOL : CDW3 = CTRL
Is there a reason you can't use Local0 instead of CTRL ? […]
I was thinking to apply support/control fields differently. I will update it with Local0.
Hello build bot (Jenkins), Chiranjeevi Rapolu, Wonkyu Kim, Tim Wawrzynczak, Duncan Laurie, Shamile Khan, Patrick Rudolph, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42821
to look at the new patch set (#4).
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
This change adds Platform-Wide _OSC capabilities for native USB4 support. There is Engineering Change Request (ECR) with _OSC addition for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 as native USB4 support. The OS sets this bit to indicate support for an OSPM-native USB4 Connection Manager which handles USB4 connection events and link management. The OS use the _OSC mechanism and the bit defined in this ECR to obtain configuration and connection management capabilities of USB4 connections. This change also fixs the byte index for the DWord-addressable field CDW3 from the capabilities buffer.
BUG=b:140645231 TEST=Check Type C device all ports connection/enumeration with SW CM.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I1b561ea5a0a6b440cca3152cc150f31abf7766ad --- M src/soc/intel/tigerlake/acpi/tcss.asl 1 file changed, 41 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/42821/4
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@10 PS2, Line 10: There is Engineering Change Request (ECR) with _OSC addition : for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 : as native USB4 support.
Sorry, I don't know. I was informed this change is needed for kernel.
I just got notice the ECR is expected to be in 6.4.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 4: Code-Review+2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42821/2//COMMIT_MSG@10 PS2, Line 10: There is Engineering Change Request (ECR) with _OSC addition : for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 : as native USB4 support.
I just got notice the ECR is expected to be in 6.4.
Thanks for the info!
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42821 )
Change subject: soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 ......................................................................
soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4
This change adds Platform-Wide _OSC capabilities for native USB4 support. There is Engineering Change Request (ECR) with _OSC addition for OSPM USB support. ACPI section 6.2.11.1.13 is modified with bit 18 as native USB4 support. The OS sets this bit to indicate support for an OSPM-native USB4 Connection Manager which handles USB4 connection events and link management. The OS use the _OSC mechanism and the bit defined in this ECR to obtain configuration and connection management capabilities of USB4 connections. This change also fixs the byte index for the DWord-addressable field CDW3 from the capabilities buffer.
BUG=b:140645231 TEST=Check Type C device all ports connection/enumeration with SW CM.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I1b561ea5a0a6b440cca3152cc150f31abf7766ad Reviewed-on: https://review.coreboot.org/c/coreboot/+/42821 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/tigerlake/acpi/tcss.asl 1 file changed, 41 insertions(+), 25 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index 3f51ecc..3312b59 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -139,38 +139,54 @@
Method (_OSC, 4, Serialized) { - /* - * Operating System Capabilities for USB4 - * Arg0: UUID = {23A0D13A-26AB-486C-9C5F-0FFA525A575A} - * Arg1: Revision ID = 1 - * Arg2: Count of entries (DWORD) in Arg3 (Integer): 3 - * Arg3: DWORD capabilities buffer: - * First DWORD: The standard definition bits are used to return errors. - * Second DWORD: OSPM support field for USB4, bits [31:0] reserved. - * Third DWORD: OSPM control field for USB4. - * bit 0: USB tunneling - * bit 1: DisplayPort tunneling - * bit 2: PCIe tunneling - * bit 3: Inter-domain USB4 internet protocol - * bit 31:4: reserved - * Return: The platform acknowledges the capabilities buffer by returning - * a buffer of DWORD of the same length. Masked/Cleared bits in the - * control field indicate that the platform does not permit OSPM - * control of the respectively capabilities or features. - */ - Name (CTRL, 0) /* Control field value */ CreateDWordField (Arg3, 0, CDW1) - If (Arg0 == ToUUID("23A0D13A-26AB-486C-9C5F-0FFA525A575A")) { - CreateDWordField (Arg3, 2, CDW3) - CTRL = CDW3 + If (Arg0 == ToUUID("0811B06E-4A27-44F9-8D60-3CBBC22E7B48")) { + /* Platform-Wide _OSC Capabilities + * Arg0: UUID = {0811B06E-4A27-44F9-8D60-3CBBC22E7B48} + * Arg1: Revision ID = 1 + * Arg2: Count of entries (DWORD) in Arge3 (Integer): 3 + * Arg3: DWORD capabilities buffer: + * First DWORD: The standard definition bits are used to return errors. + * Second DWORD: See ACPI specification Platform-Wide _OSC Capabilities + * DWORD2 table for Bits 0-17. Bit 18 is newly defined as native USB4 + * support. The OS sets this bit to indicate support for an OSPM-native + * USB4 Connection Manager which handles USB4 connection events and + * link management. + */ + If (Arg1 != REVISION_ID) { + CDW1 |= UNRECOGNIZED_REVISION + } + Return (Arg3) + } ElseIf (Arg0 == ToUUID("23A0D13A-26AB-486C-9C5F-0FFA525A575A")) { + /* + * Operating System Capabilities for USB4 + * Arg0: UUID = {23A0D13A-26AB-486C-9C5F-0FFA525A575A} + * Arg1: Revision ID = 1 + * Arg2: Count of entries (DWORD) in Arg3 (Integer): 3 + * Arg3: DWORD capabilities buffer: + * First DWORD: The standard definition bits are used to return errors. + * Second DWORD: OSPM support field for USB4, bits [31:0] reserved. + * Third DWORD: OSPM control field for USB4. + * bit 0: USB tunneling + * bit 1: DisplayPort tunneling + * bit 2: PCIe tunneling + * bit 3: Inter-domain USB4 internet protocol + * bit 31:4: reserved + * Return: The platform acknowledges the capabilities buffer by + * returning a buffer of DWORD of the same length. Masked/Cleared bits + * in the control field indicate that the platform does not permit OSPM + * control of the respectively capabilities or features. + */ + CreateDWordField (Arg3, 8, CDW3) + Local0 = CDW3
If (Arg1 != REVISION_ID) { CDW1 |= UNRECOGNIZED_REVISION Return (Arg3) } - CTRL |= USB_TUNNELING | DISPLAY_PORT_TUNNELING | PCIE_TUNNELING | + Local0 |= USB_TUNNELING | DISPLAY_PORT_TUNNELING | PCIE_TUNNELING | INTER_DOMAIN_USB4_INTERNET_PROTOCOL - CDW3 = CTRL + CDW3 = Local0 Return (Arg3) } Else { CDW1 |= UNRECOGNIZED_UUID
-
John Zhao (Code Review) -
Patrick Georgi (Code Review)
-
Tim Wawrzynczak (Code Review)