Change in coreboot[master]: Fix memory corruptions

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: Fix memory corruptions
......................................................................

Fix memory corruptions

Coverity detects source memory is overrun. Fix this issue by using
the correct source memory size to avoid memory corruption.

Found-by: Coverity CID 1429762 1429774
TEST=None

Signed-off-by: John Zhao 
Change-Id: Icc253eb9348d959a9e9e69a3f13933b7f97d6ecc
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/46504/1

diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index d66e890a..fe7641f 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -355,14 +355,14 @@

memcpy(params->PcieRpAdvancedErrorReporting,
    	config->PcieRpAdvancedErrorReporting,
-		sizeof(params->PcieRpAdvancedErrorReporting));
+		sizeof(config->PcieRpAdvancedErrorReporting));

memcpy(params->PcieRpLtrEnable, config->PcieRpLtrEnable,
           sizeof(config->PcieRpLtrEnable));
    memcpy(params->PcieRpSlotImplemented, config->PcieRpSlotImplemented,
           sizeof(config->PcieRpSlotImplemented));
    memcpy(params->PcieRpHotPlug, config->PcieRpHotPlug,
-	       sizeof(params->PcieRpHotPlug));
+	       sizeof(config->PcieRpHotPlug));

for (i = 0; i < CONFIG_MAX_ROOT_PORTS; i++) {
    	params->PcieRpMaxPayload[i] = config->PcieRpMaxPayload[i];

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[John Zhao (Code Review)]

Hello Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46504

to look at the new patch set (#2).

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

soc/intel/cannonlake: Fix memory corruptions

Coverity detects source memory is overrun. Fix this issue by using
the correct source memory size to avoid memory corruption.

Found-by: Coverity CID 1429762 1429774
TEST=None

Signed-off-by: John Zhao 
Change-Id: Icc253eb9348d959a9e9e69a3f13933b7f97d6ecc
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/46504/2

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

Patch Set 2: Code-Review-1

(1 comment)

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG@9 
PS2, Line 9: Coverity detects source memory is overrun. Fix this issue by using
So, the arrays do not have the same size? That is what needs to be fixed, then

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[John Zhao (Code Review)]

John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG@9 
PS2, Line 9: Coverity detects source memory is overrun. Fix this issue by using
> So, the arrays do not have the same size? That is what needs to be fixed, then

The destination array has fixed 24 bytes. But the source array size could be 16 or 24 bytes which is depended on PCH selection.

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG@9 
PS2, Line 9: Coverity detects source memory is overrun. Fix this issue by using
> The destination array has fixed 24 bytes. […]

Sounds like using CONFIG_MAX_ROOT_PORTS is the correct thing to do, as far as the size goes

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[John Zhao (Code Review)]

Hello build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46504

to look at the new patch set (#3).

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

soc/intel/cannonlake: Fix memory corruptions

Coverity detects source memory is overrun. Fix this issue by using
the MAX_ROOT_PORTS value to avoid memory corruption.

Found-by: Coverity CID 1429762 1429774
TEST=None

Signed-off-by: John Zhao 
Change-Id: Icc253eb9348d959a9e9e69a3f13933b7f97d6ecc
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/46504/3

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[John Zhao (Code Review)]

John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/46504/2//COMMIT_MSG@9 
PS2, Line 9: Coverity detects source memory is overrun. Fix this issue by using
> Sounds like using CONFIG_MAX_ROOT_PORTS is the correct thing to do, as far as the size goes

Agreed and updated.

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[John Zhao (Code Review)]

Hello build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46504

to look at the new patch set (#4).

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

soc/intel/cannonlake: Fix memory corruptions

Coverity detects source memory is overrun. Fix this issue by using
the CONFIG_MAX_ROOT_PORTS value to avoid memory corruption.

Found-by: Coverity CID 1429762 1429774
TEST=None

Signed-off-by: John Zhao 
Change-Id: Icc253eb9348d959a9e9e69a3f13933b7f97d6ecc
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/46504/4

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

Patch Set 4: Code-Review+2

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[Angel Pons (Code Review)]

Angel Pons has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

Removed Code-Review-1 by Angel Pons

Change in coreboot[master]: soc/intel/cannonlake: Fix memory corruptions

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46504 )

Change subject: soc/intel/cannonlake: Fix memory corruptions
......................................................................

soc/intel/cannonlake: Fix memory corruptions

Coverity detects source memory is overrun. Fix this issue by using
the CONFIG_MAX_ROOT_PORTS value to avoid memory corruption.

Found-by: Coverity CID 1429762 1429774
TEST=None

Signed-off-by: John Zhao 
Change-Id: Icc253eb9348d959a9e9e69a3f13933b7f97d6ecc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46504
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index d66e890a..fe7641f 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -355,14 +355,14 @@

memcpy(params->PcieRpAdvancedErrorReporting,
    	config->PcieRpAdvancedErrorReporting,
-		sizeof(params->PcieRpAdvancedErrorReporting));
+		sizeof(config->PcieRpAdvancedErrorReporting));

memcpy(params->PcieRpLtrEnable, config->PcieRpLtrEnable,
           sizeof(config->PcieRpLtrEnable));
    memcpy(params->PcieRpSlotImplemented, config->PcieRpSlotImplemented,
           sizeof(config->PcieRpSlotImplemented));
    memcpy(params->PcieRpHotPlug, config->PcieRpHotPlug,
-	       sizeof(params->PcieRpHotPlug));
+	       sizeof(config->PcieRpHotPlug));

for (i = 0; i < CONFIG_MAX_ROOT_PORTS; i++) {
    	params->PcieRpMaxPayload[i] = config->PcieRpMaxPayload[i];