Máté Kukri has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81550?usp=email )
Change subject: mb/dell/optiplex_9020: Fix SATA port maps ......................................................................
mb/dell/optiplex_9020: Fix SATA port maps
Previously incorrect sets of SATA ports were enabled.
Signed-off-by: Mate Kukri kukri.mate@gmail.com Change-Id: I32cb236b8f8140fba4a04c23161363d21741dcbc --- M src/mainboard/dell/optiplex_9020/devicetree.cb M src/mainboard/dell/optiplex_9020/overridetree_mt.cb 2 files changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/81550/1
diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb index c0b17a1..dce5869 100644 --- a/src/mainboard/dell/optiplex_9020/devicetree.cb +++ b/src/mainboard/dell/optiplex_9020/devicetree.cb @@ -23,7 +23,7 @@ register "gen2_dec" = "0x007c0901" register "gen3_dec" = "0x003c07e1" register "gen4_dec" = "0x001c0901" - register "sata_port_map" = "0x33" + register "sata_port_map" = "0x7"
device pci 14.0 on end # xHCI controller device pci 16.0 on end # Management Engine interface 1 diff --git a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb index 90205c2..a781960 100644 --- a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb +++ b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb @@ -3,6 +3,8 @@ chip northbridge/intel/haswell device domain 0 on chip southbridge/intel/lynxpoint + register "sata_port_map" = "0xf" + device pci 1c.1 on end # PCI (via XIO2001 bridge) device pci 1c.2 on end # PCIe 1x slot end