Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
mainboard/ocp/tiogapass: Add xeon_sp pch.asl
Use the xeon_sp pch.asl to include the intel common lpc.asl.
Change-Id: I22ee9d325888808a9c775ecee0591b661e2bba4e Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/mainboard/ocp/tiogapass/dsdt.asl 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/47305/1
diff --git a/src/mainboard/ocp/tiogapass/dsdt.asl b/src/mainboard/ocp/tiogapass/dsdt.asl index ddc7160..7905a9c 100644 --- a/src/mainboard/ocp/tiogapass/dsdt.asl +++ b/src/mainboard/ocp/tiogapass/dsdt.asl @@ -15,4 +15,8 @@ #include <soc/intel/xeon_sp/acpi/globalnvs.asl> #include <cpu/intel/common/acpi/cpu.asl> #include <soc/intel/xeon_sp/acpi/uncore.asl> + Scope (_SB.PC00) + { + #include <soc/intel/xeon_sp/acpi/pch.asl> + } }
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47305/1/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/47305/1/src/mainboard/ocp/tiogapass... PS1, Line 18: Scope (_SB.PC00) Why not add this scope in pch.asl?
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47305/1/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/47305/1/src/mainboard/ocp/tiogapass... PS1, Line 18: Scope (_SB.PC00)
Why not add this scope in pch. […]
I thought about it, but found the other intel chipsets and mainboards set the scope in the mainboard dsdt, so I kept it that way. In theory, the PC00 scope could be different per mainboard, but that is very unlikely. See CB:47304 for the deltalake change.
Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
Patch Set 1: Code-Review+1
javiergalindo@sysproconsulting.com has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
Patch Set 1: Code-Review+1
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
Patch Set 1: Code-Review+2
Marc Jones has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47305 )
Change subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl ......................................................................
mainboard/ocp/tiogapass: Add xeon_sp pch.asl
Use the xeon_sp pch.asl to include the intel common lpc.asl.
Change-Id: I22ee9d325888808a9c775ecee0591b661e2bba4e Signed-off-by: Marc Jones marcjones@sysproconsulting.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47305 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Jay Talbott JayTalbott@sysproconsulting.com Reviewed-by: Javier Galindo javiergalindo@sysproconsulting.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/ocp/tiogapass/dsdt.asl 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Jay Talbott: Looks good to me, but someone else must approve Javier Galindo: Looks good to me, but someone else must approve
diff --git a/src/mainboard/ocp/tiogapass/dsdt.asl b/src/mainboard/ocp/tiogapass/dsdt.asl index ddc7160..7905a9c 100644 --- a/src/mainboard/ocp/tiogapass/dsdt.asl +++ b/src/mainboard/ocp/tiogapass/dsdt.asl @@ -15,4 +15,8 @@ #include <soc/intel/xeon_sp/acpi/globalnvs.asl> #include <cpu/intel/common/acpi/cpu.asl> #include <soc/intel/xeon_sp/acpi/uncore.asl> + Scope (_SB.PC00) + { + #include <soc/intel/xeon_sp/acpi/pch.asl> + } }
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Angel Pons (Code Review) -
Arthur Heymans (Code Review)
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Marc Jones (Code Review)
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