Change in coreboot[master]: soc/intel/alderlake: Add known GPIO virtual wire information - coreboot-gerrit

12 May 2021


      Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Deepti Deshatty, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54088 )
Change subject: soc/intel/alderlake: Add known GPIO virtual wire information
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Patch Set 1: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2f1e2413d06e8afe4233d7111763cb45b78f845b
Gerrit-Change-Number: 54088
Gerrit-PatchSet: 1
Gerrit-Owner: Deepti Deshatty deepti.deshatty@intel.com
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Maulik V Vaghela maulik.v.vaghela@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
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Gerrit-Attention: Furquan Shaikh furquan@google.com
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Gerrit-Comment-Date: Wed, 12 May 2021 17:06:15 +0000
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