Change in coreboot[master]: mb/google/guybrush: Add a mainboard specific SPL table

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61838 )

Change subject: mb/google/guybrush: Add a mainboard specific SPL table
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mb/google/guybrush: Add a mainboard specific SPL table

Chromebook needs to do some additional check, which is not
available in the AMD's PI released SPL table.

BUG=b:216096562

Change-Id: Ib8074641b9fc9b38239a6e3837b8569e14af3342
Signed-off-by: Zheng Bao 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61838
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel 
Reviewed-by: Karthik Ramasubramanian 
Reviewed-by: Felix Held 
---
M src/mainboard/google/guybrush/Kconfig
1 file changed, 9 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Raul Rangel: Looks good to me, approved
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index b2fce84..a0040bf 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -99,6 +99,15 @@
    string
    default "src/mainboard/google/guybrush/variants/baseboard/amdfw.cfg"

+config HAVE_SPL_FILE
+	bool
+	default y
+
+config SPL_TABLE_FILE
+	string
+	depends on HAVE_SPL_FILE
+	default "3rdparty/blobs/mainboard/google/guybrush/TypeId0x55_SplTable_Prod_CZN_Chrome.sbin"
+
 if !EM100	# EM100 defaults in soc/amd/common/blocks/spi/Kconfig
 config EFS_SPI_READ_MODE
    default 4          # Dual IO (1-2-2)

9 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.