Attention is currently required from: Keith Hui, Kevin Keijzer, Paul Menzel.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78204?usp=email )
Change subject: Documentation/mb/asus/p8z77-m: Document latest test results ......................................................................
Patch Set 2:
(1 comment)
File Documentation/mainboard/asus/p8z77-m.md:
https://review.coreboot.org/c/coreboot/+/78204/comment/ec943ec7_82096f8e : PS2, Line 106: It appears all memory modules rated for DDR3-1600 will fail to boot if : max_mem_clock_mhz is set to 800 in devicetree.
We need auto downclocking. […]
No, the *sticky* scratchpad register persists across warm reboots, so they'd work for this purpose. Actually, I'd avoid using NVRAM - I switch between coreboot and vendor firmware from time to time, and vendor firmware resets its settings if coreboot has modified NVRAM.
In theory, channels should be independent, so if one stick works on its own on channel 0 and the other stick works on its own on channel 1, both should be able to work at the same time too. But something seems to be different for dual-channel.
If this discussion is going to take time, I suggest that you rebase CB:78205 out of the relation chain so that it can be submitted.