New patch to review for coreboot: cf2e03c AMD AGESA cimx/sb700: Drop APIC_ID_OFFSET and MAX_PHYSICAL_CPUS

[Kyösti Mälkki]

Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5539

-gerrit

commit cf2e03cf86a04cc1aa2e38175e4abdb995e70b70
Author: Kyösti Mälkki 
Date:   Wed Apr 16 09:43:40 2014 +0300

AMD AGESA cimx/sb700: Drop APIC_ID_OFFSET and MAX_PHYSICAL_CPUS

Following boards use cimx/sb700:
      amd/dinar
      supermicro/h8qgi
      supermicro/h8scm
      tyan/s8226

Only amd/dinar had APIC_ID_OFFSET defined, thus all had 0x0.
    There was a nonsense preprocessor directive (MAX_CPUS * MAX_PHYSICAL_CPUS >= 1).

Except for tyan, (MAX_CPUS * MAX_PHYSICAL_CPUS) % 256 == 0.
    Together with documented 4-bit restriction for APIC ID field, this APIC ID
    programming matches with MP tables and ACPI tables.

I believe this would also fix cases of cimx/sb700 with MAX_CPUS<16, which
    we do not have in the tree.

Change-Id: If8d65e95788ba02fc8d331a7af03a4d0d8cf5c69
    Signed-off-by: Kyösti Mälkki 
---
 src/mainboard/amd/dinar/Kconfig        |  8 --------
 src/mainboard/supermicro/h8qgi/Kconfig |  4 ----
 src/mainboard/supermicro/h8scm/Kconfig |  4 ----
 src/mainboard/tyan/s8226/Kconfig       |  4 ----
 src/southbridge/amd/cimx/sb700/late.c  | 14 ++++----------
 5 files changed, 4 insertions(+), 30 deletions(-)

diff --git a/src/mainboard/amd/dinar/Kconfig b/src/mainboard/amd/dinar/Kconfig
index b5434b4..6768a57 100644
--- a/src/mainboard/amd/dinar/Kconfig
+++ b/src/mainboard/amd/dinar/Kconfig
@@ -42,10 +42,6 @@ config MAINBOARD_DIR
    string
    default amd/dinar

-config APIC_ID_OFFSET
-	hex
-	default 0x0
-
 config MAINBOARD_PART_NUMBER
    string
    default "Dinar"
@@ -58,10 +54,6 @@ config MAX_CPUS
    int
    default 64

-config MAX_PHYSICAL_CPUS
-	int
-	default 16
-
 config HW_MEM_HOLE_SIZE_AUTO_INC
    bool
    default n
diff --git a/src/mainboard/supermicro/h8qgi/Kconfig b/src/mainboard/supermicro/h8qgi/Kconfig
index 6371d9e..2ff782a 100644
--- a/src/mainboard/supermicro/h8qgi/Kconfig
+++ b/src/mainboard/supermicro/h8qgi/Kconfig
@@ -54,10 +54,6 @@ config MAX_CPUS
    int
    default 64

-config MAX_PHYSICAL_CPUS
-	int
-	default 16
-
 config HW_MEM_HOLE_SIZE_AUTO_INC
    bool
    default n
diff --git a/src/mainboard/supermicro/h8scm/Kconfig b/src/mainboard/supermicro/h8scm/Kconfig
index 86395e4..7260f99 100644
--- a/src/mainboard/supermicro/h8scm/Kconfig
+++ b/src/mainboard/supermicro/h8scm/Kconfig
@@ -53,10 +53,6 @@ config MAX_CPUS
    int
    default 64

-config MAX_PHYSICAL_CPUS
-	int
-	default 16
-
 config CPU_ADDR_BITS
    int
    default 36  # TODO: Set it conservatively to match both fam10 & 15
diff --git a/src/mainboard/tyan/s8226/Kconfig b/src/mainboard/tyan/s8226/Kconfig
index 68ce152..e8d2f88 100644
--- a/src/mainboard/tyan/s8226/Kconfig
+++ b/src/mainboard/tyan/s8226/Kconfig
@@ -54,10 +54,6 @@ config MAX_CPUS
    int
    default 64

-config MAX_PHYSICAL_CPUS
-	int
-	default 2
-
 config HW_MEM_HOLE_SIZE_AUTO_INC
    bool
    default n
diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c
index b03f13a..9248ac3 100644
--- a/src/southbridge/amd/cimx/sb700/late.c
+++ b/src/southbridge/amd/cimx/sb700/late.c
@@ -218,23 +218,17 @@ static void sb700_enable(device_t dev)

case (0x14 << 3) | 0: /* 0:14:0 SMBUS */
    		{
-#if 1
    			u32 ioapic_base;
    			printk(BIOS_DEBUG, "sm_init().\n");
    			ioapic_base = IO_APIC_ADDR;
    			clear_ioapic(ioapic_base);
    			/* I/O APIC IDs are normally limited to 4-bits. Enforce this limit. */
-#if (CONFIG_APIC_ID_OFFSET == 0 && CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS >= 1)
-				/* Assign the ioapic ID the next available number after the processor core local APIC IDs */
-				setup_ioapic(ioapic_base, (UINT8) (CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS));
-#elif (CONFIG_APIC_ID_OFFSET > 0)
-				/* Assign the ioapic ID the value 0. Processor APIC IDs follow. */
+#if (CONFIG_MAX_CPUS >= 16)
    			setup_ioapic(ioapic_base, 0);
 #else
-#error "The processor APIC IDs must be lifted to make room for the I/O APIC ID"
-#endif
-#endif
-			}
+				/* Assign the ioapic ID the next available number after the processor core local APIC IDs */
+				setup_ioapic(ioapic_base, CONFIG_MAX_CPUS + 1);
+#endif			}
    		break;

case (0x14 << 3) | 1: /* 0:14:1 IDE */