Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/25880
Change subject: southbridge/intel: Remove space before/after parenthesis ......................................................................
southbridge/intel: Remove space before/after parenthesis
Change-Id: Id1bc0c88aeecc3f1d12964346326e5b087a2985e Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/fsp_bd82x6x/lpc.c M src/southbridge/intel/fsp_i89xx/lpc.c M src/southbridge/intel/fsp_rangeley/lpc.c M src/southbridge/intel/i82371eb/acpi/i82371eb.asl M src/southbridge/intel/i82371eb/smbus.c M src/southbridge/intel/i82801dx/ac97.c M src/southbridge/intel/i82801dx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/acpi/serialio.asl M src/southbridge/intel/lynxpoint/lpc.c 13 files changed, 27 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/25880/1
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 8d125eb..ea7a808 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -239,7 +239,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c index 73366f7..f17a44f 100644 --- a/src/southbridge/intel/fsp_bd82x6x/lpc.c +++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c @@ -249,7 +249,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c index 8a815c5..3a17701 100644 --- a/src/southbridge/intel/fsp_i89xx/lpc.c +++ b/src/southbridge/intel/fsp_i89xx/lpc.c @@ -249,7 +249,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index cbb2297..b9af406 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -270,7 +270,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl index 305da2a..cef36e9 100644 --- a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl +++ b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl @@ -29,11 +29,11 @@ /* 8259-compatible Programmable Interrupt Controller */ Device (PIC) { - Name (_HID, EisaId ("PNP0000") ) + Name (_HID, EisaId ("PNP0000")) Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x0020, 0x0020, 0x01, 0x02, ) - IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02, ) + IO (Decode16, 0x0020, 0x0020, 0x01, 0x02,) + IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02,) IRQNoFlags () {2} }) } @@ -41,10 +41,10 @@ /* PC-class DMA Controller */ Device (DMA1) { - Name (_HID, EisaId ("PNP0200") ) + Name (_HID, EisaId ("PNP0200")) Name (_CRS, ResourceTemplate () { - DMA (Compatibility, BusMaster, Transfer8, ) {4} + DMA (Compatibility, BusMaster, Transfer8,) {4} IO (Decode16, 0x0000, 0x0000, 0x01, 0x10,) IO (Decode16, 0x0080, 0x0080, 0x01, 0x11,) IO (Decode16, 0x0094, 0x0094, 0x01, 0x0C,) @@ -66,7 +66,7 @@ /* AT Real-Time Clock */ Device (RTC) { - Name (_HID, EisaId ("PNP0B00") ) + Name (_HID, EisaId ("PNP0B00")) Name (_CRS, ResourceTemplate () { IO (Decode16,0x0070,0x0070,0x01,0x04,) @@ -86,7 +86,7 @@ /* x87-compatible Floating Point Processing Unit */ Device (COPR) { - Name (_HID, EisaId ("PNP0C04") ) + Name (_HID, EisaId ("PNP0C04")) Name (_CRS, ResourceTemplate () { IO (Decode16,0x00F0,0x00F0,0x01,0x10,) diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c index 3477c52..5b95c57 100644 --- a/src/southbridge/intel/i82371eb/smbus.c +++ b/src/southbridge/intel/i82371eb/smbus.c @@ -68,7 +68,7 @@ * power-on default is 0x7fffbfffh */ if (gpo) { /* only 8bit access allowed */ - outb( gpo & 0xff, DEFAULT_PMBASE + GPO0); + outb(gpo & 0xff, DEFAULT_PMBASE + GPO0); outb((gpo >> 8) & 0xff, DEFAULT_PMBASE + GPO1); outb((gpo >> 16) & 0xff, DEFAULT_PMBASE + GPO2); outb((gpo >> 24) & 0xff, DEFAULT_PMBASE + GPO3); diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c index 3ed83b7..f9a7904 100644 --- a/src/southbridge/intel/i82801dx/ac97.c +++ b/src/southbridge/intel/i82801dx/ac97.c @@ -220,7 +220,7 @@ mbar = pci_read_config16(dev, MBAR) & 0xfffe;
reg16 = inw(mmbar + EXT_MODEM_ID1); - if ((reg16 & 0xc000) != 0xc000 ) { + if ((reg16 & 0xc000) != 0xc000) { if (reg16 & (1 << 0)) { reg32 = inw(mmbar + VENDOR_ID2); reg32 <<= 16; diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index 3502c8b..0f0bbcf 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -155,7 +155,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Disable NMI. */ + reg8 |= (1 << 7); /* Disable NMI. */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index bc45b9d..abc8667 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -227,7 +227,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 18025ff..c631da9 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -229,7 +229,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 559ad06..857a53e 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -231,7 +231,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);
diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl index e8e81c3..9323b91 100644 --- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl @@ -131,7 +131,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} })
Method (_CRS, 0, NotSerialized) @@ -172,7 +172,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} })
// DMA channels are only used if Serial IO DMA controller is enabled @@ -254,7 +254,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} })
// DMA channels are only used if Serial IO DMA controller is enabled @@ -333,7 +333,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} })
Method (_CRS, 0, NotSerialized) @@ -371,7 +371,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} })
// DMA channels are only used if Serial IO DMA controller is enabled @@ -422,7 +422,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13} })
// DMA channels are only used if Serial IO DMA controller is enabled @@ -473,7 +473,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13} })
Method (_CRS, 0, NotSerialized) @@ -511,7 +511,7 @@ Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {5} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {5} })
Method (_CRS, 0, NotSerialized) @@ -560,7 +560,7 @@ , // ResourceSource BAR0) Interrupt (ResourceConsumer, - Level, ActiveHigh, Shared, , , ) {14} + Level, ActiveHigh, Shared, , ,) {14} })
Method (_CRS, 0, NotSerialized) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 2e37950..d1d00c6 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -247,7 +247,7 @@ reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70);